]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
dt-bindings: memory: tegra210: Add memory client IDs
authorAaron Kling <webgeek1234@gmail.com>
Sat, 6 Sep 2025 20:16:53 +0000 (15:16 -0500)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 10 Sep 2025 09:40:38 +0000 (11:40 +0200)
Each memory client has unique hardware ID, add these IDs.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
include/dt-bindings/memory/tegra210-mc.h

index 5e082547f1794cba1f72872782e04d8747863b6d..881bf78aa8b2636bb71954968b0251145d72fecd 100644 (file)
 #define TEGRA210_MC_RESET_ETR          28
 #define TEGRA210_MC_RESET_TSECB                29
 
+#define TEGRA210_MC_PTCR               0
+#define TEGRA210_MC_DISPLAY0A          1
+#define TEGRA210_MC_DISPLAY0AB         2
+#define TEGRA210_MC_DISPLAY0B          3
+#define TEGRA210_MC_DISPLAY0BB         4
+#define TEGRA210_MC_DISPLAY0C          5
+#define TEGRA210_MC_DISPLAY0CB         6
+#define TEGRA210_MC_AFIR               14
+#define TEGRA210_MC_AVPCARM7R          15
+#define TEGRA210_MC_DISPLAYHC          16
+#define TEGRA210_MC_DISPLAYHCB         17
+#define TEGRA210_MC_HDAR               21
+#define TEGRA210_MC_HOST1XDMAR         22
+#define TEGRA210_MC_HOST1XR            23
+#define TEGRA210_MC_NVENCSRD           28
+#define TEGRA210_MC_PPCSAHBDMAR                29
+#define TEGRA210_MC_PPCSAHBSLVR                30
+#define TEGRA210_MC_SATAR              31
+#define TEGRA210_MC_MPCORER            39
+#define TEGRA210_MC_NVENCSWR           43
+#define TEGRA210_MC_AFIW               49
+#define TEGRA210_MC_AVPCARM7W          50
+#define TEGRA210_MC_HDAW               53
+#define TEGRA210_MC_HOST1XW            54
+#define TEGRA210_MC_MPCOREW            57
+#define TEGRA210_MC_PPCSAHBDMAW                59
+#define TEGRA210_MC_PPCSAHBSLVW                60
+#define TEGRA210_MC_SATAW              61
+#define TEGRA210_MC_ISPRA              68
+#define TEGRA210_MC_ISPWA              70
+#define TEGRA210_MC_ISPWB              71
+#define TEGRA210_MC_XUSB_HOSTR         74
+#define TEGRA210_MC_XUSB_HOSTW         75
+#define TEGRA210_MC_XUSB_DEVR          76
+#define TEGRA210_MC_XUSB_DEVW          77
+#define TEGRA210_MC_ISPRAB             78
+#define TEGRA210_MC_ISPWAB             80
+#define TEGRA210_MC_ISPWBB             81
+#define TEGRA210_MC_TSECSRD            84
+#define TEGRA210_MC_TSECSWR            85
+#define TEGRA210_MC_A9AVPSCR           86
+#define TEGRA210_MC_A9AVPSCW           87
+#define TEGRA210_MC_GPUSRD             88
+#define TEGRA210_MC_GPUSWR             89
+#define TEGRA210_MC_DISPLAYT           90
+#define TEGRA210_MC_SDMMCRA            96
+#define TEGRA210_MC_SDMMCRAA           97
+#define TEGRA210_MC_SDMMCR             98
+#define TEGRA210_MC_SDMMCRAB           99
+#define TEGRA210_MC_SDMMCWA            100
+#define TEGRA210_MC_SDMMCWAA           101
+#define TEGRA210_MC_SDMMCW             102
+#define TEGRA210_MC_SDMMCWAB           103
+#define TEGRA210_MC_VICSRD             108
+#define TEGRA210_MC_VICSWR             109
+#define TEGRA210_MC_VIW                        114
+#define TEGRA210_MC_DISPLAYD           115
+#define TEGRA210_MC_NVDECSRD           120
+#define TEGRA210_MC_NVDECSWR           121
+#define TEGRA210_MC_APER               122
+#define TEGRA210_MC_APEW               123
+#define TEGRA210_MC_NVJPGRD            126
+#define TEGRA210_MC_NVJPGWR            127
+#define TEGRA210_MC_SESRD              128
+#define TEGRA210_MC_SESWR              129
+#define TEGRA210_MC_AXIAPR             130
+#define TEGRA210_MC_AXIAPW             131
+#define TEGRA210_MC_ETRR               132
+#define TEGRA210_MC_ETRW               133
+#define TEGRA210_MC_TSECSRDB           134
+#define TEGRA210_MC_TSECSWRB           135
+#define TEGRA210_MC_GPUSRD2            136
+#define TEGRA210_MC_GPUSWR2            137
+
 #endif