]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 28 Aug 2024 12:41:33 +0000 (13:41 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 2 Sep 2024 09:23:57 +0000 (11:23 +0200)
Enable OSTM0-OSTM7, RIIC{0,1,2,3,6,7,8}, and SDHI1 (available on the SD2
connector) on the RZ/V2H EVK platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts

index 47f6f2bf6925a8a0b11e1e57970bc26bc20565c4..18f3fb33439a56e209025d14806b6d027f3e9bcb 100644 (file)
@@ -7,6 +7,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+#include <dt-bindings/gpio/gpio.h>
 #include "r9a09g057.dtsi"
 
 / {
        compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
 
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c6 = &i2c6;
+               i2c7 = &i2c7;
+               i2c8 = &i2c8;
+               mmc1 = &sdhi1;
                serial0 = &scif;
        };
 
                device_type = "memory";
                reg = <0x2 0x40000000 0x2 0x00000000>;
        };
+
+       reg_3p3v: regulator1 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       vqmmc_sdhi1: regulator-vccq-sdhi1 {
+               compatible = "regulator-gpio";
+               regulator-name = "SDHI1 VccQ";
+               gpios = <&pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH>;
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               gpios-states = <0>;
+               states = <3300000 0>, <1800000 1>;
+       };
 };
 
 &audio_extal_clk {
        clock-frequency = <22579200>;
 };
 
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c2 {
+       pinctrl-0 = <&i2c2_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c3 {
+       pinctrl-0 = <&i2c3_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c6 {
+       pinctrl-0 = <&i2c6_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c7 {
+       pinctrl-0 = <&i2c7_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&i2c8 {
+       pinctrl-0 = <&i2c8_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+};
+
+&ostm0 {
+       status = "okay";
+};
+
+&ostm1 {
+       status = "okay";
+};
+
+&ostm2 {
+       status = "okay";
+};
+
+&ostm3 {
+       status = "okay";
+};
+
+&ostm4 {
+       status = "okay";
+};
+
+&ostm5 {
+       status = "okay";
+};
+
+&ostm6 {
+       status = "okay";
+};
+
+&ostm7 {
+       status = "okay";
+};
+
 &pinctrl {
+       i2c0_pins: i2c0 {
+               pinmux = <RZG2L_PORT_PINMUX(3, 0, 1)>, /* I2C0_SDA */
+                        <RZG2L_PORT_PINMUX(3, 1, 1)>; /* I2C0_SCL */
+       };
+
+       i2c1_pins: i2c1 {
+               pinmux = <RZG2L_PORT_PINMUX(3, 2, 1)>, /* I2C1_SDA */
+                        <RZG2L_PORT_PINMUX(3, 3, 1)>; /* I2C1_SCL */
+       };
+
+       i2c2_pins: i2c2 {
+               pinmux = <RZG2L_PORT_PINMUX(2, 0, 4)>, /* I2C2_SDA */
+                        <RZG2L_PORT_PINMUX(2, 1, 4)>; /* I2C2_SCL */
+       };
+
+       i2c3_pins: i2c3 {
+               pinmux = <RZG2L_PORT_PINMUX(3, 6, 1)>, /* I2C3_SDA */
+                        <RZG2L_PORT_PINMUX(3, 7, 1)>; /* I2C3_SCL */
+       };
+
+       i2c6_pins: i2c6 {
+               pinmux = <RZG2L_PORT_PINMUX(4, 4, 1)>, /* I2C6_SDA */
+                        <RZG2L_PORT_PINMUX(4, 5, 1)>; /* I2C6_SCL */
+       };
+
+       i2c7_pins: i2c7 {
+               pinmux = <RZG2L_PORT_PINMUX(4, 6, 1)>, /* I2C7_SDA */
+                        <RZG2L_PORT_PINMUX(4, 7, 1)>; /* I2C7_SCL */
+       };
+
+       i2c8_pins: i2c8 {
+               pinmux = <RZG2L_PORT_PINMUX(0, 6, 1)>, /* I2C8_SDA */
+                        <RZG2L_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
+       };
+
        scif_pins: scif {
                pins = "SCIF_TXD", "SCIF_RXD";
                renesas,output-impedance = <1>;
        };
+
+       sd1-pwr-en-hog {
+               gpio-hog;
+               gpios = <RZG2L_GPIO(10, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "sd1_pwr_en";
+       };
+
+       sdhi1_pins: sd1 {
+               sd1_dat_cmd {
+                       pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
+                       input-enable;
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+
+               sd1_clk {
+                       pins = "SD1CLK";
+                       renesas,output-impedance = <3>;
+                       slew-rate = <0>;
+               };
+
+               sd1_cd {
+                       pinmux = <RZG2L_PORT_PINMUX(9, 4, 14)>; /* SD1_CD */
+               };
+       };
 };
 
 &qextal_clk {
 
        status = "okay";
 };
+
+&sdhi1 {
+       pinctrl-0 = <&sdhi1_pins>;
+       pinctrl-1 = <&sdhi1_pins>;
+       pinctrl-names = "default", "state_uhs";
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&vqmmc_sdhi1>;
+       bus-width = <4>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       status = "okay";
+};