drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP

[Why]
It is confusing to sinks if we send VSC SDP only on some format. Today we
signal colorimetry format using MSA while in formats like sRGB.
But when we switch to BT2020 we set the bit to ignore MSA  colorimetry and
instead use the colorimetry information in the VSC SDP.

But if sink supports signaling of colorimetry via VSC SDP we should always
set the MSA MISC1 bit 6, instead of doing so selectively.

[How]
If sink supports signaling of colorimetry via VSC SDP, and we are sending
the colorimetry info via VSC SDP with packet revision 05h, then always
set MSA MISC1 bit 6.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8e68fec5cc33c59aed8e63a5ed910662ae96b7d7..f2c9a5e5c6ccafb42ef6f698d1d7f0201ea6d38d 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4022,7 +4022,9 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                        struct dmcu *dmcu = core_dc->res_pool->dmcu;
 
                        stream->psr_version = dmcu->dmcu_version.psr_version;
-                       mod_build_vsc_infopacket(stream, &stream->vsc_infopacket);
+                       mod_build_vsc_infopacket(stream,
+                                       &stream->vsc_infopacket,
+                                       &stream->use_vsc_sdp_for_colorimetry);
                }
        }
 finish:

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 12ba6fdf89b73213dceed7ee0f925a2e79fd11ae..b589162121873a639254358902ed199fe3db30b6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2946,6 +2946,7 @@ void core_link_enable_stream(
                        pipe_ctx->stream_res.stream_enc,
                        &stream->timing,
                        stream->output_color_space,
+                       stream->use_vsc_sdp_for_colorimetry,
                        stream->link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP);
 
        if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index fdb6adc37857a1654fbe5e33a95d5bb027a38aa8..f8c07d5a405458c973304d3ff81892d197abf464 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -164,6 +164,7 @@ struct dc_stream_state {
 
        enum view_3d_format view_format;
 
+       bool use_vsc_sdp_for_colorimetry;
        bool ignore_msa_timing_param;
        bool converter_disable_audio;
        uint8_t qs_bit;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index 6ed922a3c1cd52da9cfad46587a634d85b665356..2baaac1e5156172cafb3bf4d0bacff200a0bf733 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -275,6 +275,7 @@ static void dce110_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting)
 {
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index 06e5bbb4545cd5512baa310c12dcc42bc2d4b80e..376c4264d295b5f9fe808e14ed44389093c66581 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -247,6 +247,7 @@ void enc1_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting)
 {
        uint32_t h_active_start;
@@ -312,10 +313,7 @@ void enc1_stream_encoder_dp_set_stream_attribute(
         * Pixel Encoding/Colorimetry Format and that a Sink device shall ignore MISC1, bit 7,
         * and MISC0, bits 7:1 (MISC1, bit 7, and MISC0, bits 7:1, become "don't care").
         */
-       if ((hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) ||
-                       (output_color_space == COLOR_SPACE_2020_YCBCR) ||
-                       (output_color_space == COLOR_SPACE_2020_RGB_FULLRANGE) ||
-                       (output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE))
+       if (use_vsc_sdp_for_colorimetry)
                misc1 = misc1 | 0x40;
        else
                misc1 = misc1 & ~0x40;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
index c9cbc21d121e8a519a4a813aa5809732f0d67867..2f00f2389e4025a9c8056b2a5b584df261b52024 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
@@ -526,6 +526,7 @@ void enc1_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting);
 
 void enc1_stream_encoder_hdmi_set_stream_attribute(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
index 4b34016164348706e8be44aca42ef24d0aa89b13..6c2d82ce43ab894eb477aa159131c3e25b8eb0f9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
@@ -533,11 +533,16 @@ void enc2_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting)
 {
        struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
 
-       enc1_stream_encoder_dp_set_stream_attribute(enc, crtc_timing, output_color_space, enable_sdp_splitting);
+       enc1_stream_encoder_dp_set_stream_attribute(enc,
+                       crtc_timing,
+                       output_color_space,
+                       use_vsc_sdp_for_colorimetry,
+                       enable_sdp_splitting);
 
        REG_UPDATE(DP_SEC_FRAMING4,
                DP_SST_SDP_SPLITTING, enable_sdp_splitting);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h
index 3f94a9f13c4a7a91938ee6e1051d55158205882f..d2a805bd457342443791008c3d8eb7f74e7a3bde 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h
@@ -98,6 +98,7 @@ void enc2_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting);
 
 void enc2_stream_encoder_dp_unblank(

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index 6305e388612a22fb2bc0261ebcd8ba85a5a00a6c..c0b93d51ca8d4bde4f87d2e29e1ab6b9504f5208 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -126,6 +126,7 @@ struct stream_encoder_funcs {
                struct stream_encoder *enc,
                struct dc_crtc_timing *crtc_timing,
                enum dc_color_space output_color_space,
+               bool use_vsc_sdp_for_colorimetry,
                uint32_t enable_sdp_splitting);
 
        void (*hdmi_set_stream_attribute)(

diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
index ff664bdb1482883a4a4d3692d32b33c38a3bd010..d1ce75212d9f00dc247881df99ab809e7595cc03 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
@@ -32,6 +32,7 @@ static void virtual_stream_encoder_dp_set_stream_attribute(
        struct stream_encoder *enc,
        struct dc_crtc_timing *crtc_timing,
        enum dc_color_space output_color_space,
+       bool use_vsc_sdp_for_colorimetry,
        uint32_t enable_sdp_splitting) {}
 
 static void virtual_stream_encoder_hdmi_set_stream_attribute(

diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h b/drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h
index ca8ce3c55337bf968c0d4d76c58ea51f04e76ad5..42cbeffac6402bd099c5ee7f08bb7f1930320be4 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h
@@ -26,6 +26,7 @@
 #ifndef MOD_INFO_PACKET_H_
 #define MOD_INFO_PACKET_H_
 
+#include "dm_services.h"
 #include "mod_shared.h"
 //Forward Declarations
 struct dc_stream_state;
@@ -33,7 +34,8 @@ struct dc_info_packet;
 struct mod_vrr_params;
 
 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
-               struct dc_info_packet *info_packet);
+               struct dc_info_packet *info_packet,
+               bool *use_vsc_sdp_for_colorimetry);
 
 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
                struct dc_info_packet *info_packet, int ALLMEnabled, int ALLMValue);

diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
index db6b08f6d0931876ea504bb2d96af3b90367889b..6a8a056424b85c83dfffcc18d1396bc412fb2c5f 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
+++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
@@ -30,6 +30,20 @@
 #include "mod_freesync.h"
 #include "dc.h"
 
+enum vsc_packet_revision {
+       vsc_packet_undefined = 0,
+       //01h = VSC SDP supports only 3D stereo.
+       vsc_packet_rev1 = 1,
+       //02h = 3D stereo + PSR.
+       vsc_packet_rev2 = 2,
+       //03h = 3D stereo + PSR2.
+       vsc_packet_rev3 = 3,
+       //04h = 3D stereo + PSR/PSR2 + Y-coordinate.
+       vsc_packet_rev4 = 4,
+       //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format
+       vsc_packet_rev5 = 5,
+};
+
 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81
 #define HF_VSIF_VERSION 1
 
@@ -116,35 +130,41 @@ enum ColorimetryYCCDP {
 };
 
 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
-               struct dc_info_packet *info_packet)
+               struct dc_info_packet *info_packet,
+               bool *use_vsc_sdp_for_colorimetry)
 {
-       unsigned int vscPacketRevision = 0;
+       unsigned int vsc_packet_revision = vsc_packet_undefined;
        unsigned int i;
        unsigned int pixelEncoding = 0;
        unsigned int colorimetryFormat = 0;
        bool stereo3dSupport = false;
 
+       /* Initialize first, later if infopacket is valid determine if VSC SDP
+        * should be used to signal colorimetry format and pixel encoding.
+        */
+       *use_vsc_sdp_for_colorimetry = false;
+
        if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
-               vscPacketRevision = 1;
+               vsc_packet_revision = vsc_packet_rev1;
                stereo3dSupport = true;
        }
 
        /*VSC packet set to 2 when DP revision >= 1.2*/
        if (stream->psr_version != 0)
-               vscPacketRevision = 2;
+               vsc_packet_revision = vsc_packet_rev2;
 
        /* Update to revision 5 for extended colorimetry support for DPCD 1.4+ */
        if (stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
                        stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED)
-               vscPacketRevision = 5;
+               vsc_packet_revision = vsc_packet_rev5;
 
        /* VSC packet not needed based on the features
         * supported by this DP display
         */
-       if (vscPacketRevision == 0)
+       if (vsc_packet_revision == vsc_packet_undefined)
                return;
 
-       if (vscPacketRevision == 0x2) {
+       if (vsc_packet_revision == vsc_packet_rev2) {
                /* Secondary-data Packet ID = 0*/
                info_packet->hb0 = 0x00;
                /* 07h - Packet Type Value indicating Video
@@ -166,7 +186,7 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
                info_packet->valid = true;
        }
 
-       if (vscPacketRevision == 0x1) {
+       if (vsc_packet_revision == vsc_packet_rev1) {
 
                info_packet->hb0 = 0x00;        // Secondary-data Packet ID = 0
                info_packet->hb1 = 0x07;        // 07h = Packet Type Value indicating Video Stream Configuration packet
@@ -237,7 +257,7 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
         *   the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and
         *   MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").)
         */
-       if (vscPacketRevision == 0x5) {
+       if (vsc_packet_revision == vsc_packet_rev5) {
                /* Secondary-data Packet ID = 0 */
                info_packet->hb0 = 0x00;
                /* 07h - Packet Type Value indicating Video Stream Configuration packet */
@@ -249,6 +269,13 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
 
                info_packet->valid = true;
 
+               /* If we are using VSC SDP revision 05h, use this to signal for
+                * colorimetry format and pixel encoding. HW should later be
+                * programmed to set MSA MISC1 bit 6 to indicate ignore
+                * colorimetry format and pixel encoding in the MSA.
+                */
+               *use_vsc_sdp_for_colorimetry = true;
+
                /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs
                 * Data Bytes DB 18~16
                 * Bits 3:0 (Colorimetry Format)        |  Bits 7:4 (Pixel Encoding)
@@ -393,7 +420,6 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
                 */
                info_packet->sb[18] = 0;
        }
-
 }
 
 /**