.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "MISC IO power well",
+ .name = "MISC_IO",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = SKL_PW_CTL_IDX_MISC_IO,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = SKL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.hsw.idx = SKL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "DDI A/E IO power well",
+ .name = "DDI_IO_A_E",
.domains = SKL_DISPLAY_DDI_IO_A_E_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = SKL_PW_CTL_IDX_DDI_A_E,
},
}, {
- .name = "DDI B IO power well",
+ .name = "DDI_IO_B",
.domains = SKL_DISPLAY_DDI_IO_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = SKL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO power well",
+ .name = "DDI_IO_C",
.domains = SKL_DISPLAY_DDI_IO_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = SKL_PW_CTL_IDX_DDI_C,
},
}, {
- .name = "DDI D IO power well",
+ .name = "DDI_IO_D",
.domains = SKL_DISPLAY_DDI_IO_D_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = BXT_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = GLK_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.bxt.phy = DPIO_PHY2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = GLK_DISPLAY_AUX_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = GLK_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = GLK_DISPLAY_AUX_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = GLK_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = GLK_DISPLAY_AUX_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = GLK_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "DDI A IO power well",
+ .name = "DDI_IO_A",
.domains = GLK_DISPLAY_DDI_IO_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = GLK_PW_CTL_IDX_DDI_A,
},
}, {
- .name = "DDI B IO power well",
+ .name = "DDI_IO_B",
.domains = GLK_DISPLAY_DDI_IO_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = SKL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO power well",
+ .name = "DDI_IO_C",
.domains = GLK_DISPLAY_DDI_IO_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = ICL_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = ICL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
},
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
},
}, {
- .name = "DDI D IO",
+ .name = "DDI_IO_D",
.domains = ICL_DDI_IO_D_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_D,
},
}, {
- .name = "DDI E IO",
+ .name = "DDI_IO_E",
.domains = ICL_DDI_IO_E_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_E,
},
}, {
- .name = "DDI F IO",
+ .name = "DDI_IO_F",
.domains = ICL_DDI_IO_F_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_F,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C TC1",
+ .name = "AUX_C",
.domains = ICL_AUX_C_TC1_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX D TC2",
+ .name = "AUX_D",
.domains = ICL_AUX_D_TC2_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
},
}, {
- .name = "AUX E TC3",
+ .name = "AUX_E",
.domains = ICL_AUX_E_TC3_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
},
}, {
- .name = "AUX F TC4",
+ .name = "AUX_F",
.domains = ICL_AUX_F_TC4_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
},
}, {
- .name = "AUX C TBT1",
+ .name = "AUX_TBT1",
.domains = ICL_AUX_C_TBT1_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX D TBT2",
+ .name = "AUX_TBT2",
.domains = ICL_AUX_D_TBT2_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX E TBT3",
+ .name = "AUX_TBT3",
.domains = ICL_AUX_E_TBT3_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX F TBT4",
+ .name = "AUX_TBT4",
.domains = ICL_AUX_F_TBT4_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = ICL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_C),
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = TGL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = TGL_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = TGL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "DDI IO TC3",
+ .name = "DDI_IO_TC3",
.domains = TGL_DDI_IO_TC3_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC3,
},
}, {
- .name = "DDI IO TC4",
+ .name = "DDI_IO_TC4",
.domains = TGL_DDI_IO_TC4_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC4,
},
}, {
- .name = "DDI IO TC5",
+ .name = "DDI_IO_TC5",
.domains = TGL_DDI_IO_TC5_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC5,
},
}, {
- .name = "DDI IO TC6",
+ .name = "DDI_IO_TC6",
.domains = TGL_DDI_IO_TC6_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC6,
},
}, {
- .name = "TC cold off",
+ .name = "TC_cold_off",
.domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
.ops = &tgl_tc_cold_off_ops,
.id = TGL_DISP_PW_TC_COLD_OFF,
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = TGL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = TGL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = TGL_AUX_C_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "AUX USBC3",
+ .name = "AUX_USBC3",
.domains = TGL_AUX_IO_USBC3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC3,
},
}, {
- .name = "AUX USBC4",
+ .name = "AUX_USBC4",
.domains = TGL_AUX_IO_USBC4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC4,
},
}, {
- .name = "AUX USBC5",
+ .name = "AUX_USBC5",
.domains = TGL_AUX_IO_USBC5_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC5,
},
}, {
- .name = "AUX USBC6",
+ .name = "AUX_USBC6",
.domains = TGL_AUX_IO_USBC6_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC6,
},
}, {
- .name = "AUX TBT1",
+ .name = "AUX_TBT1",
.domains = TGL_AUX_IO_TBT1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX TBT2",
+ .name = "AUX_TBT2",
.domains = TGL_AUX_IO_TBT2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX TBT3",
+ .name = "AUX_TBT3",
.domains = TGL_AUX_IO_TBT3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX TBT4",
+ .name = "AUX_TBT4",
.domains = TGL_AUX_IO_TBT4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT4,
},
}, {
- .name = "AUX TBT5",
+ .name = "AUX_TBT5",
.domains = TGL_AUX_IO_TBT5_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT5,
},
}, {
- .name = "AUX TBT6",
+ .name = "AUX_TBT6",
.domains = TGL_AUX_IO_TBT6_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT6,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = TGL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "power well 5",
+ .name = "PW_5",
.domains = TGL_PW_5_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = RKL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = RKL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = RKL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = DG1_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = DG1_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = DG1_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = TGL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = TGL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = TGL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "power well 5",
+ .name = "PW_5",
.domains = TGL_PW_5_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = XELPD_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = XELPD_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well A",
+ .name = "PW_A",
.domains = XELPD_PW_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_A),
.hsw.idx = XELPD_PW_CTL_IDX_PW_A,
},
}, {
- .name = "power well B",
+ .name = "PW_B",
.domains = XELPD_PW_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
.hsw.idx = XELPD_PW_CTL_IDX_PW_B,
},
}, {
- .name = "power well C",
+ .name = "PW_C",
.domains = XELPD_PW_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_C),
.hsw.idx = XELPD_PW_CTL_IDX_PW_C,
},
}, {
- .name = "power well D",
+ .name = "PW_D",
.domains = XELPD_PW_D_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_D),
.hsw.idx = XELPD_PW_CTL_IDX_PW_D,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
}
}, {
- .name = "DDI IO D_XELPD",
+ .name = "DDI_IO_D_XELPD",
.domains = XELPD_DDI_IO_D_XELPD_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = XELPD_PW_CTL_IDX_DDI_D,
}
}, {
- .name = "DDI IO E_XELPD",
+ .name = "DDI_IO_E_XELPD",
.domains = XELPD_DDI_IO_E_XELPD_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = XELPD_PW_CTL_IDX_DDI_E,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = XELPD_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
}
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = XELPD_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
}
}, {
- .name = "DDI IO TC3",
+ .name = "DDI_IO_TC3",
.domains = XELPD_DDI_IO_TC3_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC3,
}
}, {
- .name = "DDI IO TC4",
+ .name = "DDI_IO_TC4",
.domains = XELPD_DDI_IO_TC4_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC4,
}
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = TGL_AUX_C_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX D_XELPD",
+ .name = "AUX_D_XELPD",
.domains = XELPD_AUX_IO_D_XELPD_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
.hsw.idx = XELPD_PW_CTL_IDX_AUX_D,
},
}, {
- .name = "AUX E_XELPD",
+ .name = "AUX_E_XELPD",
.domains = XELPD_AUX_IO_E_XELPD_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = XELPD_PW_CTL_IDX_AUX_E,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = XELPD_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = XELPD_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "AUX USBC3",
+ .name = "AUX_USBC3",
.domains = XELPD_AUX_IO_USBC3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC3,
},
}, {
- .name = "AUX USBC4",
+ .name = "AUX_USBC4",
.domains = XELPD_AUX_IO_USBC4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC4,
},
}, {
- .name = "AUX TBT1",
+ .name = "AUX_TBT1",
.domains = XELPD_AUX_IO_TBT1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX TBT2",
+ .name = "AUX_TBT2",
.domains = XELPD_AUX_IO_TBT2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX TBT3",
+ .name = "AUX_TBT3",
.domains = XELPD_AUX_IO_TBT3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX TBT4",
+ .name = "AUX_TBT4",
.domains = XELPD_AUX_IO_TBT4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
projects / users / hch / xfs.git / commitdiff