drm/i915: Use cmpxchg64 for 32b compatilibity

By using the double wide cmpxchg64 on 32bit, we can use the same
algorithm on both 32/64b systems.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201211110310.22740-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index 10a865f3dc09ac4ba90993aa420b23af1650faf3..ab4382841c6b7201328aafca3a9790b49f38ed6c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -159,8 +159,7 @@ __active_retire(struct i915_active *ref)
                GEM_BUG_ON(ref->tree.rb_node != &ref->cache->node);
 
                /* Make the cached node available for reuse with any timeline */
-               if (IS_ENABLED(CONFIG_64BIT))
-                       ref->cache->timeline = 0; /* needs cmpxchg(u64) */
+               ref->cache->timeline = 0; /* needs cmpxchg(u64) */
        }
 
        spin_unlock_irqrestore(&ref->tree_lock, flags);
@@ -256,7 +255,6 @@ static struct active_node *__active_lookup(struct i915_active *ref, u64 idx)
                if (cached == idx)
                        return it;
 
-#ifdef CONFIG_64BIT /* for cmpxchg(u64) */
                /*
                 * An unclaimed cache [.timeline=0] can only be claimed once.
                 *
@@ -267,9 +265,8 @@ static struct active_node *__active_lookup(struct i915_active *ref, u64 idx)
                 * only the winner of that race will cmpxchg return the old
                 * value of 0).
                 */
-               if (!cached && !cmpxchg(&it->timeline, 0, idx))
+               if (!cached && !cmpxchg64(&it->timeline, 0, idx))
                        return it;
-#endif
        }
 
        BUILD_BUG_ON(offsetof(typeof(*it), node));