drm/aspeed: Update INTR_STS handling

Add interrupt clear register define for further chip support.

Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302024930.18758-4-tommy_huang@aspeedtech.com

diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
index 96501152bafac38ff5ab99ae6bd7117b4aca52da..4e6a442c3886d41517388e2fc0231b5a2bfb2374 100644 (file)
--- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
+++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
@@ -12,6 +12,7 @@ struct aspeed_gfx {
        struct regmap                   *scu;
 
        u32                             dac_reg;
+       u32                             int_clr_reg;
        u32                             vga_scratch_reg;
        u32                             throd_val;
        u32                             scan_line_max;

diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
index 13f496473b9eaf8ee7b90cadddc50840439d2e1e..63db774f6eb2021a6d0970023a49327f357fdd4f 100644 (file)
--- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
+++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
@@ -61,6 +61,7 @@
 
 struct aspeed_gfx_config {
        u32 dac_reg;            /* DAC register in SCU */
+       u32 int_clear_reg;      /* Interrupt clear register */
        u32 vga_scratch_reg;    /* VGA scratch register in SCU */
        u32 throd_val;          /* Default Threshold Seting */
        u32 scan_line_max;      /* Max memory size of one scan line */
@@ -68,6 +69,7 @@ struct aspeed_gfx_config {
 
 static const struct aspeed_gfx_config ast2400_config = {
        .dac_reg = 0x2c,
+       .int_clear_reg = 0x60,
        .vga_scratch_reg = 0x50,
        .throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),
        .scan_line_max = 64,
@@ -75,6 +77,7 @@ static const struct aspeed_gfx_config ast2400_config = {
 
 static const struct aspeed_gfx_config ast2500_config = {
        .dac_reg = 0x2c,
+       .int_clear_reg = 0x60,
        .vga_scratch_reg = 0x50,
        .throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),
        .scan_line_max = 128,
@@ -120,7 +123,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
 
        if (reg & CRT_CTRL_VERTICAL_INTR_STS) {
                drm_crtc_handle_vblank(&priv->pipe.crtc);
-               writel(reg, priv->base + CRT_CTRL1);
+               writel(reg, priv->base + priv->int_clr_reg);
                return IRQ_HANDLED;
        }
 
@@ -148,6 +151,7 @@ static int aspeed_gfx_load(struct drm_device *drm)
        config = match->data;
 
        priv->dac_reg = config->dac_reg;
+       priv->int_clr_reg = config->int_clear_reg;
        priv->vga_scratch_reg = config->vga_scratch_reg;
        priv->throd_val = config->throd_val;
        priv->scan_line_max = config->scan_line_max;