KVM: arm64: Disable hierarchical permissions when S1PIE is enabled

S1PIE implicitly disables hierarchical permissions, as specified in
R_JHSVW, by making TCR_ELx.HPDn RES1.

Add a predicate for S1PIE being enabled for a given translation regime,
and emulate this behaviour by forcing the hpd field to true if S1PIE
is enabled for that translation regime.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20241023145345.1613824-21-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c
index adcfce3f67f03ca6b47afd484445e5d889dcb3bd..f5bd750288ff51a863583eecd09a92ca80ea8cae 100644 (file)
--- a/arch/arm64/kvm/at.c
+++ b/arch/arm64/kvm/at.c
@@ -93,6 +93,23 @@ static enum trans_regime compute_translation_regime(struct kvm_vcpu *vcpu, u32 o
        }
 }
 
+static bool s1pie_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime)
+{
+       if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S1PIE, IMP))
+               return false;
+
+       switch (regime) {
+       case TR_EL2:
+       case TR_EL20:
+               return vcpu_read_sys_reg(vcpu, TCR2_EL2) & TCR2_EL2_PIE;
+       case TR_EL10:
+               return  (__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TCR2En) &&
+                       (__vcpu_sys_reg(vcpu, TCR2_EL1) & TCR2_EL1x_PIE);
+       default:
+               BUG();
+       }
+}
+
 static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,
                         struct s1_walk_result *wr, u64 va)
 {
@@ -186,6 +203,8 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,
                    (va55 ?
                     FIELD_GET(TCR_HPD1, tcr) :
                     FIELD_GET(TCR_HPD0, tcr)));
+       /* R_JHSVW */
+       wi->hpd |= s1pie_enabled(vcpu, wi->regime);
 
        /* Someone was silly enough to encode TG0/TG1 differently */
        if (va55) {