]> www.infradead.org Git - linux.git/commitdiff
dt-bindings: arm: qcom: Add X1P42100 SoC & CRD
authorKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Sat, 21 Dec 2024 12:36:01 +0000 (13:36 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 26 Dec 2024 03:55:29 +0000 (21:55 -0600)
The X1 family is split into two parts: the 10- and 12-core parts are
variants of the same silicon with different fusing, whereas the 8-core
ones are a separate design. Thankfully, the software interface is only
barely different, letting us reuse much of the existing X1 work.

Add X1P42100 SoC (and the CRD based on it) as a representative of the
8-core series.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-2-55347831d73c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Documentation/devicetree/bindings/arm/qcom.yaml

index d394dffe3fba5a396b85a6093f34e9ef62b6f9cc..c5b7268cd9407c1e8a33b291d541d33c1e5cb6eb 100644 (file)
@@ -99,6 +99,7 @@ description: |
         sm8650
         x1e78100
         x1e80100
+        x1p42100
 
   There are many devices in the list below that run the standard ChromeOS
   bootloader setup and use the open source depthcharge bootloader to boot the
@@ -1122,6 +1123,11 @@ properties:
               - qcom,x1e80100-qcp
           - const: qcom,x1e80100
 
+      - items:
+          - enum:
+              - qcom,x1p42100-crd
+          - const: qcom,x1p42100
+
   # Board compatibles go above
 
   qcom,msm-id: