goto err_stop_fw;
                }
  
+               if (mlx4_is_master(dev))
+                       mlx4_parav_master_pf_caps(dev);
+ 
 +              priv->fs_hash_mode = MLX4_FS_L2_HASH;
 +
 +              switch (priv->fs_hash_mode) {
 +              case MLX4_FS_L2_HASH:
 +                      init_hca.fs_hash_enable_bits = 0;
 +                      break;
 +
 +              case MLX4_FS_L2_L3_L4_HASH:
 +                      /* Enable flow steering with
 +                       * udp unicast and tcp unicast
 +                       */
 +                      init_hca.fs_hash_enable_bits =
 +                              MLX4_FS_UDP_UC_EN | MLX4_FS_TCP_UC_EN;
 +                      break;
 +              }
 +
                profile = default_profile;
 +              if (dev->caps.steering_mode ==
 +                  MLX4_STEERING_MODE_DEVICE_MANAGED)
 +                      profile.num_mcg = MLX4_FS_NUM_MCG;
  
                icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
                                             &init_hca);
 
        u8                      rev_id;
        char                    board_id[MLX4_BOARD_ID_LEN];
        int                     num_vfs;
 +      u64                     regid_promisc_array[MLX4_MAX_PORTS + 1];
 +      u64                     regid_allmulti_array[MLX4_MAX_PORTS + 1];
  };
  
+ struct mlx4_eqe {
+       u8                      reserved1;
+       u8                      type;
+       u8                      reserved2;
+       u8                      subtype;
+       union {
+               u32             raw[6];
+               struct {
+                       __be32  cqn;
+               } __packed comp;
+               struct {
+                       u16     reserved1;
+                       __be16  token;
+                       u32     reserved2;
+                       u8      reserved3[3];
+                       u8      status;
+                       __be64  out_param;
+               } __packed cmd;
+               struct {
+                       __be32  qpn;
+               } __packed qp;
+               struct {
+                       __be32  srqn;
+               } __packed srq;
+               struct {
+                       __be32  cqn;
+                       u32     reserved1;
+                       u8      reserved2[3];
+                       u8      syndrome;
+               } __packed cq_err;
+               struct {
+                       u32     reserved1[2];
+                       __be32  port;
+               } __packed port_change;
+               struct {
+                       #define COMM_CHANNEL_BIT_ARRAY_SIZE     4
+                       u32 reserved;
+                       u32 bit_vec[COMM_CHANNEL_BIT_ARRAY_SIZE];
+               } __packed comm_channel_arm;
+               struct {
+                       u8      port;
+                       u8      reserved[3];
+                       __be64  mac;
+               } __packed mac_update;
+               struct {
+                       __be32  slave_id;
+               } __packed flr_event;
+               struct {
+                       __be16  current_temperature;
+                       __be16  warning_threshold;
+               } __packed warming;
+               struct {
+                       u8 reserved[3];
+                       u8 port;
+                       union {
+                               struct {
+                                       __be16 mstr_sm_lid;
+                                       __be16 port_lid;
+                                       __be32 changed_attr;
+                                       u8 reserved[3];
+                                       u8 mstr_sm_sl;
+                                       __be64 gid_prefix;
+                               } __packed port_info;
+                               struct {
+                                       __be32 block_ptr;
+                                       __be32 tbl_entries_mask;
+                               } __packed tbl_change_info;
+                       } params;
+               } __packed port_mgmt_change;
+       }                       event;
+       u8                      slave_id;
+       u8                      reserved3[2];
+       u8                      owner;
+ } __packed;
+ 
  struct mlx4_init_port_param {
        int                     set_guid0;
        int                     set_node_guid;
  int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);
  void mlx4_counter_free(struct mlx4_dev *dev, u32 idx);
  
 +int mlx4_flow_attach(struct mlx4_dev *dev,
 +                   struct mlx4_net_trans_rule *rule, u64 *reg_id);
 +int mlx4_flow_detach(struct mlx4_dev *dev, u64 reg_id);
 +
+ int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey);
+ 
  #endif /* MLX4_DEVICE_H */