arm64: dts: qcom: ipq6018: add sdhci node

Add node to support mmc controller inside of IPQ6018.
This controller supports both eMMC and SD cards.

Tested with:
  eMMC (HS200)
  SD Card (SDR50/SDR104)

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240620150122.1406631-3-amadeus@jmu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 9694140881c6d175fe7e8413768b8315bc520007..b3b98f050cfd0c425b2c108216754d3523df1acd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -457,6 +457,25 @@
                        };
                };
 
+               sdhc: mmc@7804000 {
+                       compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
+                       reg = <0x0 0x07804000 0x0 0x1000>,
+                             <0x0 0x07805000 0x0 0x1000>;
+                       reg-names = "hc", "cqhci";
+
+                       interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&xo>;
+                       clock-names = "iface", "core", "xo";
+                       resets = <&gcc GCC_SDCC1_BCR>;
+                       max-frequency = <192000000>;
+                       status = "disabled";
+               };
+
                blsp_dma: dma-controller@7884000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x0 0x07884000 0x0 0x2b000>;