{
        struct gfar __iomem *regs = priv->gfargrp[0].regs;
        u32 __iomem *baddr;
-       int i = 0;
-
-       /* Backward compatible case ---- even if we enable
-        * multiple queues, there's only single reg to program
-        */
-       gfar_write(®s->txic, 0);
-       if (likely(priv->tx_queue[0]->txcoalescing))
-               gfar_write(®s->txic, priv->tx_queue[0]->txic);
-
-       gfar_write(®s->rxic, 0);
-       if (unlikely(priv->rx_queue[0]->rxcoalescing))
-               gfar_write(®s->rxic, priv->rx_queue[0]->rxic);
 
        if (priv->mode == MQ_MG_MODE) {
+               int i = 0;
                baddr = ®s->txic0;
                for_each_set_bit(i, &tx_mask, priv->num_tx_queues) {
                        gfar_write(baddr + i, 0);
                        if (likely(priv->rx_queue[i]->rxcoalescing))
                                gfar_write(baddr + i, priv->rx_queue[i]->rxic);
                }
+       } else {
+               /* Backward compatible case ---- even if we enable
+                * multiple queues, there's only single reg to program
+                */
+               gfar_write(®s->txic, 0);
+               if (likely(priv->tx_queue[0]->txcoalescing))
+                       gfar_write(®s->txic, priv->tx_queue[0]->txic);
+
+               gfar_write(®s->rxic, 0);
+               if (unlikely(priv->rx_queue[0]->rxcoalescing))
+                       gfar_write(®s->rxic, priv->rx_queue[0]->rxic);
        }
 }