MIPS: Support R_MIPS_PC{16,21,26} rel-style relocs

MIPS32 code uses rel-style relocs, and MIPS32r6 modules may include
R_MIPS_PC16, R_MIPS_PC21 & R_MIPS_PC26 relocations. We thus need to
support these relocations in order to load MIPS32r6 kernel modules. This
patch adds such support, which is similar to the rela-style support in
module-rela.c but making use of the implicit addend from the instruction
encoding.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Steven J. Hill <sjhill@realitydiluted.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12435/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index e16624f57fd5ad355913143ce51951bb7eb1a48c..ff5d97d2e6701189eb093fdb3d3111a9973f2f6c 100644 (file)
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -182,13 +182,62 @@ out_danger:
        return -ENOEXEC;
 }
 
+static int apply_r_mips_pc_rel(struct module *me, u32 *location, Elf_Addr v,
+                              unsigned bits)
+{
+       unsigned long mask = GENMASK(bits - 1, 0);
+       unsigned long se_bits;
+       long offset;
+
+       if (v % 4) {
+               pr_err("module %s: dangerous R_MIPS_PC%u REL relocation\n",
+                      me->name, bits);
+               return -ENOEXEC;
+       }
+
+       /* retrieve & sign extend implicit addend */
+       offset = *location & mask;
+       offset |= (offset & BIT(bits - 1)) ? ~mask : 0;
+
+       offset += ((long)v - (long)location) >> 2;
+
+       /* check the sign bit onwards are identical - ie. we didn't overflow */
+       se_bits = (offset & BIT(bits - 1)) ? ~0ul : 0;
+       if ((offset & ~mask) != (se_bits & ~mask)) {
+               pr_err("module %s: relocation overflow\n", me->name);
+               return -ENOEXEC;
+       }
+
+       *location = (*location & ~mask) | (offset & mask);
+
+       return 0;
+}
+
+static int apply_r_mips_pc16_rel(struct module *me, u32 *location, Elf_Addr v)
+{
+       return apply_r_mips_pc_rel(me, location, v, 16);
+}
+
+static int apply_r_mips_pc21_rel(struct module *me, u32 *location, Elf_Addr v)
+{
+       return apply_r_mips_pc_rel(me, location, v, 21);
+}
+
+static int apply_r_mips_pc26_rel(struct module *me, u32 *location, Elf_Addr v)
+{
+       return apply_r_mips_pc_rel(me, location, v, 26);
+}
+
 static int (*reloc_handlers_rel[]) (struct module *me, u32 *location,
                                Elf_Addr v) = {
        [R_MIPS_NONE]           = apply_r_mips_none,
        [R_MIPS_32]             = apply_r_mips_32_rel,
        [R_MIPS_26]             = apply_r_mips_26_rel,
        [R_MIPS_HI16]           = apply_r_mips_hi16_rel,
-       [R_MIPS_LO16]           = apply_r_mips_lo16_rel
+       [R_MIPS_LO16]           = apply_r_mips_lo16_rel,
+       [R_MIPS_PC16]           = apply_r_mips_pc16_rel,
+       [R_MIPS_PC21_S2]        = apply_r_mips_pc21_rel,
+       [R_MIPS_PC26_S2]        = apply_r_mips_pc26_rel,
 };
 
 int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,