drm/amd/display: [FW Promotion] Release 0.0.101.0

- Add Scr8 for GPINT messaging between driver and fw

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index e13d50abc28167e464f6ee4746ed1cb179d084d3..3ef6a7a0c7b69ede28a64ad4a282fa80f84ec26b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -46,10 +46,10 @@
 
 /* Firmware versioning. */
 #ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0x56a29f36
+#define DMUB_FW_VERSION_GIT_HASH 0x1288a7b7
 #define DMUB_FW_VERSION_MAJOR 0
 #define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 100
+#define DMUB_FW_VERSION_REVISION 101
 #define DMUB_FW_VERSION_TEST 0
 #define DMUB_FW_VERSION_VBIOS 0
 #define DMUB_FW_VERSION_HOTFIX 0
@@ -367,8 +367,9 @@ union dmub_fw_boot_options {
                /**< 1 if all root clock gating is enabled and low power memory is enabled*/
                uint32_t power_optimization: 1;
                uint32_t diag_env: 1; /* 1 if diagnostic environment */
+               uint32_t gpint_scratch8: 1; /* 1 if GPINT is in scratch8*/
 
-               uint32_t reserved : 19; /**< reserved */
+               uint32_t reserved : 18; /**< reserved */
        } bits; /**< boot bits */
        uint32_t all; /**< 32-bit access to bits */
 };
@@ -644,6 +645,7 @@ enum dmub_cmd_type {
         * Command type used for OUTBOX1 notification enable
         */
        DMUB_CMD__OUTBOX1_ENABLE = 71,
+
        /**
         * Command type used for all idle optimization commands.
         */
@@ -656,6 +658,7 @@ enum dmub_cmd_type {
         * Command type used for all panel control commands.
         */
        DMUB_CMD__PANEL_CNTL = 74,
+
        /**
         * Command type used for interfacing with DPIA.
         */