drm/amdgpu: correct Arcturus SDMA address space base index

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 647a4e916ec59bfc3afce31cdf5d576a00bd6068..b97306f1df11fbd67dd1683c01bae4b859826d53 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -211,17 +211,17 @@ static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev,
        case 1:
                return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);
        case 2:
-               return (adev->reg_offset[SDMA2_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA2_HWIP][0][1] + offset);
        case 3:
-               return (adev->reg_offset[SDMA3_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA3_HWIP][0][1] + offset);
        case 4:
-               return (adev->reg_offset[SDMA4_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA4_HWIP][0][1] + offset);
        case 5:
-               return (adev->reg_offset[SDMA5_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA5_HWIP][0][1] + offset);
        case 6:
-               return (adev->reg_offset[SDMA6_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA6_HWIP][0][1] + offset);
        case 7:
-               return (adev->reg_offset[SDMA7_HWIP][0][0] + offset);
+               return (adev->reg_offset[SDMA7_HWIP][0][1] + offset);
        default:
                break;
        }