drm/xe: Don't refer to general LRC initialization as a "wa"

During engine LRC initialization a number of registers need to be
programmed as general setup.  This programming is not a "workaround" so
naming the RTP table as "lrc_was" is misleading; switch to the name
"lrc_setup" to more accurately describe what the table is actually for.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240524230444.1447797-2-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index de1aefaa2335226d91cb3739b07fd37d3fb16ff4..9eef789be8978dfd2deb92a38459241e8cd3b4d5 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -342,7 +342,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
        u32 blit_cctl_val = REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, mocs_write_idx) |
                            REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, mocs_read_idx);
        struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
-       const struct xe_rtp_entry_sr lrc_was[] = {
+       const struct xe_rtp_entry_sr lrc_setup[] = {
                /*
                 * Some blitter commands do not have a field for MOCS, those
                 * commands will use MOCS index pointed by BLIT_CCTL.
@@ -374,7 +374,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
                {}
        };
 
-       xe_rtp_process_to_sr(&ctx, lrc_was, &hwe->reg_lrc);
+       xe_rtp_process_to_sr(&ctx, lrc_setup, &hwe->reg_lrc);
 }
 
 static void