MSI: Don't assign MSI IRQ vector twice

Orabug: 26275961

NVMe enables MSIx interrupts during the nvme device probe
and also during nvme reset. While enabling MSIx interrupts
using do_setup_msix_irqs(), it does it twice. It assigns
the IRQ under the function irq_alloc_hwirqs() and again
shortly using setup_msi_irq(). During the first invocation
from irq_alloc_hwirqs(), it sets the cfg->vector and
cfg->domain of the specific IRQ. During the subsequent
invocation from setup_msi_irq(), if the cfg->domain
intersects with the target cpumask (tmp_mask) then
the move_in_progress flag is set. This flag is never cleared
unless it is set via proc file system. As this flag is not
cleared, the subsequent smp affinity set via procfs fails.

Upstream introduced IRQ domain hierarchy where they assign
the IRQ only once. However, pulling in IRQ domain hierarchy
from the upstream brings with it lot of changes (85 commits).
Hence, this patch assigns the IRQ only once.

Signed-off-by: Ashok Vairavan <ashok.vairavan@oracle.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index d6ba2d660dc52f59945825ef80a66821d5a971a5..8c186a300b96b3bad029028a5592cbf2ab02a2ec 100644 (file)
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -61,9 +61,11 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
                return -ENXIO;
 
        cfg = irq_cfg(irq);
-       err = assign_irq_vector(irq, cfg, apic->target_cpus());
-       if (err)
-               return err;
+       if(!cfg->vector) {
+               err = assign_irq_vector(irq, cfg, apic->target_cpus());
+               if (err)
+                       return err;
+       }
 
        err = apic->cpu_mask_to_apicid_and(cfg->domain,
                                           apic->target_cpus(), &dest);