MSG_MAP(GetSystemMetricsTable, PPSMC_MSG_GetSystemMetricsTable, 0),
};
+int smu_v13_0_12_tables_init(struct smu_context *smu)
+{
+ struct amdgpu_baseboard_temp_metrics_v1_0 *baseboard_temp_metrics;
+ struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = smu_table->tables;
+ struct smu_table_cache *cache;
+ int ret;
+
+ ret = smu_table_cache_init(smu, SMU_TABLE_BASEBOARD_TEMP_METRICS,
+ sizeof(*baseboard_temp_metrics), 50);
+ if (ret)
+ return ret;
+ /* Initialize base board temperature metrics */
+ cache = &(tables[SMU_TABLE_BASEBOARD_TEMP_METRICS].cache);
+ baseboard_temp_metrics =
+ (struct amdgpu_baseboard_temp_metrics_v1_0 *) cache->buffer;
+ smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);
+ /* Initialize GPU board temperature metrics */
+ ret = smu_table_cache_init(smu, SMU_TABLE_GPUBOARD_TEMP_METRICS,
+ sizeof(*gpuboard_temp_metrics), 50);
+ if (ret)
+ return ret;
+ cache = &(tables[SMU_TABLE_GPUBOARD_TEMP_METRICS].cache);
+ gpuboard_temp_metrics = (struct amdgpu_gpuboard_temp_metrics_v1_0 *)cache->buffer;
+ smu_cmn_init_gpuboard_temp_metrics(gpuboard_temp_metrics, 1, 0);
+
+ return 0;
+}
+
+void smu_v13_0_12_tables_fini(struct smu_context *smu)
+{
+ smu_table_cache_fini(smu, SMU_TABLE_BASEBOARD_TEMP_METRICS);
+ smu_table_cache_fini(smu, SMU_TABLE_GPUBOARD_TEMP_METRICS);
+}
+
static int smu_v13_0_12_get_enabled_mask(struct smu_context *smu,
uint64_t *feature_mask)
{
static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu,
enum smu_temp_metric_type type, void *table)
{
- struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
struct amdgpu_baseboard_temp_metrics_v1_0 *baseboard_temp_metrics;
- SystemMetricsTable_t *metrics;
+ struct amdgpu_gpuboard_temp_metrics_v1_0 *gpuboard_temp_metrics;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ SystemMetricsTable_t *metrics =
+ (SystemMetricsTable_t *)smu_table->metrics_table;
+
+ struct smu_table *data_table;
int ret, sensor_type;
u32 idx, sensors;
ssize_t size;
- size = (type == SMU_TEMP_METRIC_GPUBOARD) ?
- sizeof(*gpuboard_temp_metrics) : sizeof(*baseboard_temp_metrics);
-
- if (!table)
- goto out;
- metrics = kzalloc(sizeof(SystemMetricsTable_t), GFP_KERNEL);
- if (!metrics)
- return -ENOMEM;
- gpuboard_temp_metrics = (struct amdgpu_gpuboard_temp_metrics_v1_0 *)table;
- baseboard_temp_metrics = (struct amdgpu_baseboard_temp_metrics_v1_0 *)table;
- if (type == SMU_TEMP_METRIC_GPUBOARD)
- smu_cmn_init_gpuboard_temp_metrics(gpuboard_temp_metrics, 1, 0);
- else if (type == SMU_TEMP_METRIC_BASEBOARD)
- smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);
-
- ret = smu_v13_0_12_get_system_metrics_table(smu, metrics);
- if (ret) {
- kfree(metrics);
- return ret;
+ if (type == SMU_TEMP_METRIC_BASEBOARD) {
+ /* Initialize base board temperature metrics */
+ data_table =
+ &smu->smu_table.tables[SMU_TABLE_BASEBOARD_TEMP_METRICS];
+ baseboard_temp_metrics =
+ (struct amdgpu_baseboard_temp_metrics_v1_0 *)
+ data_table->cache.buffer;
+ size = sizeof(*baseboard_temp_metrics);
+ } else {
+ data_table =
+ &smu->smu_table.tables[SMU_TABLE_GPUBOARD_TEMP_METRICS];
+ gpuboard_temp_metrics =
+ (struct amdgpu_gpuboard_temp_metrics_v1_0 *)
+ data_table->cache.buffer;
+ size = sizeof(*baseboard_temp_metrics);
}
+ ret = smu_v13_0_12_get_system_metrics_table(smu, NULL);
+ if (ret)
+ return ret;
+
+ smu_table_cache_update_time(data_table, jiffies);
+
if (type == SMU_TEMP_METRIC_GPUBOARD) {
gpuboard_temp_metrics->accumulation_counter = metrics->AccumulationCounter;
gpuboard_temp_metrics->label_version = metrics->LabelVersion;
}
}
- kfree(metrics);
+ memcpy(table, data_table->cache.buffer, size);
-out:
return size;
}
if (fw_ver >= 0x04560700) {
if (!amdgpu_sriov_vf(smu->adev))
smu_v13_0_6_cap_set(smu, SMU_CAP(TEMP_METRICS));
+ } else {
+ smu_v13_0_12_tables_fini(smu);
}
}
return -ENOMEM;
}
+ if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
+ return smu_v13_0_12_tables_init(smu);
+
return 0;
}
return ret;
}
+static int smu_v13_0_6_fini_smc_tables(struct smu_context *smu)
+{
+ if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
+ smu_v13_0_12_tables_fini(smu);
+ return smu_v13_0_fini_smc_tables(smu);
+}
+
static int smu_v13_0_6_get_allowed_feature_mask(struct smu_context *smu,
uint32_t *feature_mask,
uint32_t num)
.init_microcode = smu_v13_0_6_init_microcode,
.fini_microcode = smu_v13_0_fini_microcode,
.init_smc_tables = smu_v13_0_6_init_smc_tables,
- .fini_smc_tables = smu_v13_0_fini_smc_tables,
+ .fini_smc_tables = smu_v13_0_6_fini_smc_tables,
.init_power = smu_v13_0_init_power,
.fini_power = smu_v13_0_fini_power,
.check_fw_status = smu_v13_0_6_check_fw_status,