drm/bridge: tc358767: Do not cache dsi_lanes twice

The DSI lane count can be accessed via the dsi device pointer,
make use of that. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220624181902.151959-1-marex@denx.de

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index e4dd4f05f94b3cfe72d19673ab69f13c26e72a92..44f32bf483c51da584ef02078e5dbe02ef970171 100644 (file)
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -288,7 +288,6 @@ struct tc_data {
        struct drm_connector    connector;
 
        struct mipi_dsi_device  *dsi;
-       u8                      dsi_lanes;
 
        /* link settings */
        struct tc_edp_link      link;
@@ -1261,7 +1260,7 @@ static int tc_dsi_rx_enable(struct tc_data *tc)
        regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
        regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD);
 
-       value = ((LANEENABLE_L0EN << tc->dsi_lanes) - LANEENABLE_L0EN) |
+       value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) |
                LANEENABLE_CLEN;
        regmap_write(tc->regmap, PPI_LANEENABLE, value);
        regmap_write(tc->regmap, DSI_LANEENABLE, value);
@@ -1909,8 +1908,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
 
        tc->dsi = dsi;
 
-       tc->dsi_lanes = dsi_lanes;
-       dsi->lanes = tc->dsi_lanes;
+       dsi->lanes = dsi_lanes;
        dsi->format = MIPI_DSI_FMT_RGB888;
        dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;