#define PCIE_DESC_RX_I_TCP_CSUM_OK     cpu_to_le16(BIT(11))
 #define PCIE_DESC_RX_I_UDP_CSUM                cpu_to_le16(BIT(10))
 #define PCIE_DESC_RX_I_UDP_CSUM_OK     cpu_to_le16(BIT(9))
-#define PCIE_DESC_RX_BPF               cpu_to_le16(BIT(8))
+#define PCIE_DESC_RX_DECRYPTED         cpu_to_le16(BIT(8))
 #define PCIE_DESC_RX_EOP               cpu_to_le16(BIT(7))
 #define PCIE_DESC_RX_IP4_CSUM          cpu_to_le16(BIT(6))
 #define PCIE_DESC_RX_IP4_CSUM_OK       cpu_to_le16(BIT(5))
  * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
  * @hw_csum_rx_complete: Counter of packets with CHECKSUM_COMPLETE reported
  * @hw_csum_rx_error:   Counter of packets with bad checksums
+ * @hw_tls_rx:     Number of packets with TLS decrypted by hardware
  * @tx_sync:       Seqlock for atomic updates of TX stats
  * @tx_pkts:       Number of Transmitted packets
  * @tx_bytes:      Number of Transmitted bytes
        u64 hw_csum_rx_ok;
        u64 hw_csum_rx_inner_ok;
        u64 hw_csum_rx_complete;
+       u64 hw_tls_rx;
 
        u64 hw_csum_rx_error;
        u64 rx_replace_buf_alloc_fail;
 
 
                nfp_net_rx_csum(dp, r_vec, rxd, &meta, skb);
 
+#ifdef CONFIG_TLS_DEVICE
+               if (rxd->rxd.flags & PCIE_DESC_RX_DECRYPTED) {
+                       skb->decrypted = true;
+                       u64_stats_update_begin(&r_vec->rx_sync);
+                       r_vec->hw_tls_rx++;
+                       u64_stats_update_end(&r_vec->rx_sync);
+               }
+#endif
+
                if (rxd->rxd.flags & PCIE_DESC_RX_VLAN)
                        __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
                                               le16_to_cpu(rxd->rxd.vlan));
 
 
 #define NN_ET_GLOBAL_STATS_LEN ARRAY_SIZE(nfp_net_et_stats)
 #define NN_ET_SWITCH_STATS_LEN 9
-#define NN_RVEC_GATHER_STATS   12
+#define NN_RVEC_GATHER_STATS   13
 #define NN_RVEC_PER_Q_STATS    3
 #define NN_CTRL_PATH_STATS     1
 
        data = nfp_pr_et(data, "hw_rx_csum_complete");
        data = nfp_pr_et(data, "hw_rx_csum_err");
        data = nfp_pr_et(data, "rx_replace_buf_alloc_fail");
+       data = nfp_pr_et(data, "rx_tls_decrypted");
        data = nfp_pr_et(data, "hw_tx_csum");
        data = nfp_pr_et(data, "hw_tx_inner_csum");
        data = nfp_pr_et(data, "tx_gather");
                        tmp[2] = nn->r_vecs[i].hw_csum_rx_complete;
                        tmp[3] = nn->r_vecs[i].hw_csum_rx_error;
                        tmp[4] = nn->r_vecs[i].rx_replace_buf_alloc_fail;
+                       tmp[5] = nn->r_vecs[i].hw_tls_rx;
                } while (u64_stats_fetch_retry(&nn->r_vecs[i].rx_sync, start));
 
                do {
                        start = u64_stats_fetch_begin(&nn->r_vecs[i].tx_sync);
                        data[1] = nn->r_vecs[i].tx_pkts;
                        data[2] = nn->r_vecs[i].tx_busy;
-                       tmp[5] = nn->r_vecs[i].hw_csum_tx;
-                       tmp[6] = nn->r_vecs[i].hw_csum_tx_inner;
-                       tmp[7] = nn->r_vecs[i].tx_gather;
-                       tmp[8] = nn->r_vecs[i].tx_lso;
-                       tmp[9] = nn->r_vecs[i].hw_tls_tx;
-                       tmp[10] = nn->r_vecs[i].tls_tx_fallback;
-                       tmp[11] = nn->r_vecs[i].tls_tx_no_fallback;
+                       tmp[6] = nn->r_vecs[i].hw_csum_tx;
+                       tmp[7] = nn->r_vecs[i].hw_csum_tx_inner;
+                       tmp[8] = nn->r_vecs[i].tx_gather;
+                       tmp[9] = nn->r_vecs[i].tx_lso;
+                       tmp[10] = nn->r_vecs[i].hw_tls_tx;
+                       tmp[11] = nn->r_vecs[i].tls_tx_fallback;
+                       tmp[12] = nn->r_vecs[i].tls_tx_no_fallback;
                } while (u64_stats_fetch_retry(&nn->r_vecs[i].tx_sync, start));
 
                data += NN_RVEC_PER_Q_STATS;