compatible = "samsung,s5pv210-i2s";
                        status = "disabled";
                        reg = <0x03830000 0x100>;
-                       dmas = <&pdma0 10
-                               &pdma0 9
-                               &pdma0 8>;
+                       dmas = <&pdma0 10>,
+                               <&pdma0 9>,
+                               <&pdma0 8>;
                        dma-names = "tx", "rx", "tx-sec";
                        clocks = <&clock_audss EXYNOS_I2S_BUS>,
                                <&clock_audss EXYNOS_I2S_BUS>,
                        compatible = "samsung,s3c6410-i2s";
                        status = "disabled";
                        reg = <0x12D60000 0x100>;
-                       dmas = <&pdma1 12
-                               &pdma1 11>;
+                       dmas = <&pdma1 12>,
+                               <&pdma1 11>;
                        dma-names = "tx", "rx";
                        clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
                        clock-names = "iis", "i2s_opclk0";
                        compatible = "samsung,s3c6410-i2s";
                        status = "disabled";
                        reg = <0x12D70000 0x100>;
-                       dmas = <&pdma0 12
-                               &pdma0 11>;
+                       dmas = <&pdma0 12>,
+                               <&pdma0 11>;
                        dma-names = "tx", "rx";
                        clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
                        clock-names = "iis", "i2s_opclk0";
 
                audi2s0: i2s@3830000 {
                        compatible = "samsung,exynos5420-i2s";
                        reg = <0x03830000 0x100>;
-                       dmas = <&pdma0 10
-                               &pdma0 9
-                               &pdma0 8>;
+                       dmas = <&pdma0 10>,
+                               <&pdma0 9>,
+                               <&pdma0 8>;
                        dma-names = "tx", "rx", "tx-sec";
                        clocks = <&clock_audss EXYNOS_I2S_BUS>,
                                <&clock_audss EXYNOS_I2S_BUS>,
 
                i2s0: i2s@3830000 {
                        compatible = "samsung,exynos5420-i2s";
                        reg = <0x03830000 0x100>;
-                       dmas = <&adma 0
-                               &adma 2
-                               &adma 1>;
+                       dmas = <&adma 0>,
+                               <&adma 2>,
+                               <&adma 1>;
                        dma-names = "tx", "rx", "tx-sec";
                        clocks = <&clock_audss EXYNOS_I2S_BUS>,
                                <&clock_audss EXYNOS_I2S_BUS>,
                i2s1: i2s@12d60000 {
                        compatible = "samsung,exynos5420-i2s";
                        reg = <0x12D60000 0x100>;
-                       dmas = <&pdma1 12
-                               &pdma1 11>;
+                       dmas = <&pdma1 12>,
+                               <&pdma1 11>;
                        dma-names = "tx", "rx";
                        clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
                        clock-names = "iis", "i2s_opclk0";
                i2s2: i2s@12d70000 {
                        compatible = "samsung,exynos5420-i2s";
                        reg = <0x12D70000 0x100>;
-                       dmas = <&pdma0 12
-                               &pdma0 11>;
+                       dmas = <&pdma0 12>,
+                               <&pdma0 11>;
                        dma-names = "tx", "rx";
                        clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
                        clock-names = "iis", "i2s_opclk0";