]> www.infradead.org Git - qemu-nvme.git/commitdiff
hw/acpi/piix4: change smm_enabled from int to bool
authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Sat, 28 May 2022 09:02:11 +0000 (10:02 +0100)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Sat, 11 Jun 2022 09:44:06 +0000 (11:44 +0200)
This is in preparation for conversion to a qdev property.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20220528091934.15520-3-mark.cave-ayland@ilande.co.uk>
[PMD: Change simm_enabled from int to bool, suggested by Ani Sinha]
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
hw/acpi/piix4.c
include/hw/southbridge/piix.h

index bf20fa139b3fbc1779b53f77024f9c42d68ce878..558c250884c6c4be3c3ffd72d3a3d556d1f215c6 100644 (file)
@@ -74,7 +74,7 @@ struct PIIX4PMState {
 
     qemu_irq irq;
     qemu_irq smi_irq;
-    int smm_enabled;
+    bool smm_enabled;
     bool smm_compat;
     Notifier machine_ready;
     Notifier powerdown_notifier;
@@ -538,7 +538,7 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
 
 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                       qemu_irq sci_irq, qemu_irq smi_irq,
-                      int smm_enabled, DeviceState **piix4_pm)
+                      bool smm_enabled, DeviceState **piix4_pm)
 {
     PCIDevice *pci_dev;
     DeviceState *dev;
index f63f83e5c6116cfcfefd66acc27fd19c98be8aa9..ff8d96ae8cadd7df9ba53a9fdb75ccd30ea59660 100644 (file)
@@ -19,7 +19,7 @@
 
 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                       qemu_irq sci_irq, qemu_irq smi_irq,
-                      int smm_enabled, DeviceState **piix4_pm);
+                      bool smm_enabled, DeviceState **piix4_pm);
 
 /* PIRQRC[A:D]: PIRQx Route Control Registers */
 #define PIIX_PIRQCA 0x60