net/mlx5e: Register nic devlink port with switch id

We will re-use the native NIC port net device instance for the Uplink
representor. Since the netdev will be kept registered while we engage
switchdev mode also the devlink will be kept registered.
Register the nic devlink port with switch id so it will be available
when changing profiles.

Signed-off-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c
index a69c62d72d16ebf7eed8262e1413200d02f6dfbb..054bc2fc05206859333bc435320047ddbb5b19f1 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c
@@ -2,22 +2,43 @@
 /* Copyright (c) 2020, Mellanox Technologies inc.  All rights reserved. */
 
 #include "en/devlink.h"
+#include "eswitch.h"
+
+static void
+mlx5e_devlink_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid)
+{
+       u64 parent_id;
+
+       parent_id = mlx5_query_nic_system_image_guid(dev);
+       ppid->id_len = sizeof(parent_id);
+       memcpy(ppid->id, &parent_id, sizeof(parent_id));
+}
 
 int mlx5e_devlink_port_register(struct mlx5e_priv *priv)
 {
        struct devlink *devlink = priv_to_devlink(priv->mdev);
        struct devlink_port_attrs attrs = {};
+       struct netdev_phys_item_id ppid = {};
+       unsigned int dl_port_index;
 
        if (mlx5_core_is_pf(priv->mdev)) {
                attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
                attrs.phys.port_number = PCI_FUNC(priv->mdev->pdev->devfn);
+               if (MLX5_ESWITCH_MANAGER(priv->mdev)) {
+                       mlx5e_devlink_get_port_parent_id(priv->mdev, &ppid);
+                       memcpy(attrs.switch_id.id, ppid.id, ppid.id_len);
+                       attrs.switch_id.id_len = ppid.id_len;
+               }
+               dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev,
+                                                                    MLX5_VPORT_UPLINK);
        } else {
                attrs.flavour = DEVLINK_PORT_FLAVOUR_VIRTUAL;
+               dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev, 0);
        }
 
        devlink_port_attrs_set(&priv->dl_port, &attrs);
 
-       return devlink_port_register(devlink, &priv->dl_port, 1);
+       return devlink_port_register(devlink, &priv->dl_port, dl_port_index);
 }
 
 void mlx5e_devlink_port_type_eth_set(struct mlx5e_priv *priv)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index fdf5c8c05c1b4438d07a6365893e278345439da4..d0b907a9ef288931e4b33bb0c051109e5f1a0c19 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -781,6 +781,13 @@ esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
 {
        return ERR_PTR(-EOPNOTSUPP);
 }
+
+static inline unsigned int
+mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
+                                    u16 vport_num)
+{
+       return vport_num;
+}
 #endif /* CONFIG_MLX5_ESWITCH */
 
 #endif /* __MLX5_ESWITCH_H__ */