riscv: dts: starfive: jh7110-common: revised device node

Earlier this year a new DTSI file was created to define common
properties for the StarFive VisionFive 2 and Milk-V Mars boards,
both of which use the StarFive JH7110 SoC.  The Pine64 Star64
board has also been added since that time.

Some of the nodes defined in "jh7110-common.dtsi" are enabled in
that file because all of the boards including it "want" them
enabled.

An upcoming patch enables another JH7110 board, but for that
board not all of these common nodes should be enabled.  Prepare
for supporting the new board by avoiding enabling these nodes in
"jh7110-common.dtsi", and enable them instead in these files:
   jh7110-milkv-mars.dts
   jh7110-pine64-star64.dts
   jh7110-starfive-visionfive-2.dtsi

Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index c7771b3b64758893759a822422f001cf3cbfa44d..9e77f79ec162163e11562fc66ecc5836da8b6a77 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -176,7 +176,6 @@
 &gmac0 {
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       status = "okay";
 
        mdio {
                #address-cells = <1>;
@@ -196,7 +195,6 @@
        i2c-scl-falling-time-ns = <510>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c0_pins>;
-       status = "okay";
 };
 
 &i2c2 {
@@ -311,7 +309,6 @@
 &pwmdac {
        pinctrl-names = "default";
        pinctrl-0 = <&pwmdac_pins>;
-       status = "okay";
 };
 
 &qspi {
@@ -350,13 +347,11 @@
 &pwm {
        pinctrl-names = "default";
        pinctrl-0 = <&pwm_pins>;
-       status = "okay";
 };
 
 &spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&spi0_pins>;
-       status = "okay";
 
        spi_dev0: spi@0 {
                compatible = "rohm,dh2228fv";

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
index 5cb9e99e1dacd52134bfb2345111881ba0ac0b59..66ad3eb2fd6654ed6f0397992d41aa6ce2e3250d 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
@@ -15,6 +15,11 @@
        starfive,tx-use-rgmii-clk;
        assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
        assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
 };
 
 &pcie0 {
@@ -35,3 +40,15 @@
        rx-internal-delay-ps = <1500>;
        tx-internal-delay-ps = <1500>;
 };
+
+&pwm {
+       status = "okay";
+};
+
+&pwmdac {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
index b720cdd15ed6e806a772935bfcb45d7b29756625..dbc8612b84646ed05e100ea6d97d26b847e362f5 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
@@ -18,6 +18,7 @@
        starfive,tx-use-rgmii-clk;
        assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
        assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+       status = "okay";
 };
 
 &gmac1 {
@@ -39,6 +40,10 @@
        };
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &pcie1 {
        status = "okay";
 };
@@ -63,3 +68,15 @@
        motorcomm,tx-clk-10-inverted;
        motorcomm,tx-clk-100-inverted;
 };
+
+&pwm {
+       status = "okay";
+};
+
+&pwmdac {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 18f38fc790a4d1b7d53910473e7f0f488e504a56..ef93a394bb2f1fa0980bf4d798b9849ed339b33f 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -13,6 +13,10 @@
        };
 };
 
+&gmac0 {
+       status = "okay";
+};
+
 &gmac1 {
        phy-handle = <&phy1>;
        phy-mode = "rgmii-id";
@@ -29,6 +33,10 @@
        };
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &mmc0 {
        non-removable;
 };
@@ -40,3 +48,15 @@
 &pcie1 {
        status = "okay";
 };
+
+&pwm {
+       status = "okay";
+};
+
+&pwmdac {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+};