.enable_cmd_parser = 1,
        .disable_vtd_wa = 0,
        .use_mmio_flip = 0,
+       .mmio_debug = 0,
 };
 
 module_param_named(modeset, i915.modeset, int, 0400);
 module_param_named(use_mmio_flip, i915.use_mmio_flip, int, 0600);
 MODULE_PARM_DESC(use_mmio_flip,
                 "use MMIO flips (-1=never, 0=driver discretion [default], 1=always)");
+
+module_param_named(mmio_debug, i915.mmio_debug, bool, 0600);
+MODULE_PARM_DESC(mmio_debug,
+       "Enable the MMIO debug code (default: false). This may negatively "
+       "affect performance.");
 
 }
 
 static void
-hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
+hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read,
+                       bool before)
 {
+       const char *op = read ? "reading" : "writing to";
+       const char *when = before ? "before" : "after";
+
+       if (!i915.mmio_debug)
+               return;
+
        if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
-               DRM_ERROR("Unknown unclaimed register before writing to %x\n",
-                         reg);
+               WARN(1, "Unclaimed register detected %s %s register 0x%x\n",
+                    when, op, reg);
                __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
        }
 }
 
 static void
-hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
+hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv)
 {
+       if (i915.mmio_debug)
+               return;
+
        if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
-               DRM_ERROR("Unclaimed write to %x\n", reg);
+               DRM_ERROR("Unclaimed register detected. Please use the i915.mmio_debug=1 to debug this problem.");
                __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
        }
 }
 static u##x \
 gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
        REG_READ_HEADER(x); \
+       hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
        if (dev_priv->uncore.forcewake_count == 0 && \
            NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
                dev_priv->uncore.funcs.force_wake_get(dev_priv, \
        } else { \
                val = __raw_i915_read##x(dev_priv, reg); \
        } \
+       hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \
        REG_READ_FOOTER; \
 }
 
        if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
                __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
        } \
-       hsw_unclaimed_reg_clear(dev_priv, reg); \
+       hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
        __raw_i915_write##x(dev_priv, reg, val); \
        if (unlikely(__fifo_ret)) { \
                gen6_gt_check_fifodbg(dev_priv); \
        } \
-       hsw_unclaimed_reg_check(dev_priv, reg); \
+       hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
+       hsw_unclaimed_reg_detect(dev_priv); \
        REG_WRITE_FOOTER; \
 }