// SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <robdclark@gmail.com>
        return 0;
 }
 
+static void dpu_crtc_setup_lm_misr(struct dpu_crtc_state *crtc_state)
+{
+       struct dpu_crtc_mixer *m;
+       int i;
+
+       for (i = 0; i < crtc_state->num_mixers; ++i) {
+               m = &crtc_state->mixers[i];
+
+               if (!m->hw_lm || !m->hw_lm->ops.setup_misr)
+                       continue;
+
+               /* Calculate MISR over 1 frame */
+               m->hw_lm->ops.setup_misr(m->hw_lm, true, 1);
+       }
+}
+
 static int dpu_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)
 {
        enum dpu_crtc_crc_source source = dpu_crtc_parse_crc_source(src_name);
        enum dpu_crtc_crc_source current_source;
        struct dpu_crtc_state *crtc_state;
        struct drm_device *drm_dev = crtc->dev;
-       struct dpu_crtc_mixer *m;
 
        bool was_enabled;
        bool enable = false;
-       int i, ret = 0;
+       int ret = 0;
 
        if (source < 0) {
                DRM_DEBUG_DRIVER("Invalid CRC source %s for CRTC%d\n", src_name, crtc->index);
 
        crtc_state->crc_frame_skip_count = 0;
 
-       for (i = 0; i < crtc_state->num_mixers; ++i) {
-               m = &crtc_state->mixers[i];
-
-               if (!m->hw_lm || !m->hw_lm->ops.setup_misr)
-                       continue;
-
-               /* Calculate MISR over 1 frame */
-               m->hw_lm->ops.setup_misr(m->hw_lm, true, 1);
-       }
-
+       if (source == DPU_CRTC_CRC_SOURCE_LAYER_MIXER)
+               dpu_crtc_setup_lm_misr(crtc_state);
+       else
+               ret = -EINVAL;
 
 cleanup:
        drm_modeset_unlock(&crtc->mutex);
        return dpu_encoder_get_vsync_count(encoder);
 }
 
-
-static int dpu_crtc_get_crc(struct drm_crtc *crtc)
+static int dpu_crtc_get_lm_crc(struct drm_crtc *crtc,
+               struct dpu_crtc_state *crtc_state)
 {
-       struct dpu_crtc_state *crtc_state;
        struct dpu_crtc_mixer *m;
        u32 crcs[CRTC_DUAL_MIXERS];
 
-       int i = 0;
        int rc = 0;
-
-       crtc_state = to_dpu_crtc_state(crtc->state);
+       int i;
 
        BUILD_BUG_ON(ARRAY_SIZE(crcs) != ARRAY_SIZE(crtc_state->mixers));
 
-       /* Skip first 2 frames in case of "uncooked" CRCs */
-       if (crtc_state->crc_frame_skip_count < 2) {
-               crtc_state->crc_frame_skip_count++;
-               return 0;
-       }
-
        for (i = 0; i < crtc_state->num_mixers; ++i) {
 
                m = &crtc_state->mixers[i];
                        drm_crtc_accurate_vblank_count(crtc), crcs);
 }
 
+static int dpu_crtc_get_crc(struct drm_crtc *crtc)
+{
+       struct dpu_crtc_state *crtc_state = to_dpu_crtc_state(crtc->state);
+
+       /* Skip first 2 frames in case of "uncooked" CRCs */
+       if (crtc_state->crc_frame_skip_count < 2) {
+               crtc_state->crc_frame_skip_count++;
+               return 0;
+       }
+
+       if (crtc_state->crc_source == DPU_CRTC_CRC_SOURCE_LAYER_MIXER)
+               return dpu_crtc_get_lm_crc(crtc, crtc_state);
+
+       return -EINVAL;
+}
+
 static bool dpu_crtc_get_scanout_position(struct drm_crtc *crtc,
                                           bool in_vblank_irq,
                                           int *vpos, int *hpos,