]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
perf vendor events: Update TigerLake events
authorIan Rogers <irogers@google.com>
Mon, 30 Jun 2025 16:31:00 +0000 (09:31 -0700)
committerNamhyung Kim <namhyung@kernel.org>
Mon, 7 Jul 2025 23:45:06 +0000 (16:45 -0700)
Update events from v1.17 to v1.18.

Bring in the event updates v1.18:
https://github.com/intel/perfmon/commit/943fea37d0d54232605f12abf72a812ac314cd1d

Signed-off-by: Ian Rogers <irogers@google.com>
Tested-by: Thomas Falcon <thomas.falcon@intel.com>
Link: https://lore.kernel.org/r/20250630163101.1920170-16-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
tools/perf/pmu-events/arch/x86/mapfile.csv
tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json

index 2d9699efff5844cb4f0b7d8b0884005c0a19a100..354ce241500bbb5ad05a757ed2fb25cf4176c506 100644 (file)
@@ -35,7 +35,7 @@ GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core
 GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v59,skylake,core
 GenuineIntel-6-55-[01234],v1.37,skylakex,core
 GenuineIntel-6-86,v1.23,snowridgex,core
-GenuineIntel-6-8[CD],v1.17,tigerlake,core
+GenuineIntel-6-8[CD],v1.18,tigerlake,core
 GenuineIntel-6-2C,v5,westmereep-dp,core
 GenuineIntel-6-25,v4,westmereep-sp,core
 GenuineIntel-6-2F,v4,westmereex,core
index 7ef1bac08463fb01caa3ba2ded22b06daf4d95ac..b417e1db9e07dfe7014956e7e3665069123be063 100644 (file)
         "Counter": "0,1,2,3",
         "EventCode": "0x4c",
         "EventName": "LOAD_HIT_PREFETCH.SWPF",
-        "PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
         "SampleAfterValue": "100003",
         "UMask": "0x1"
     },