pio->chip.label = pio->name;
pio->chip.base = pdev->id * 32;
pio->chip.ngpio = 32;
- pio->chip.dev = &pdev->dev;
+ pio->chip.parent = &pdev->dev;
pio->chip.owner = THIS_MODULE;
pio->chip.direction_input = direction_input;
chip->direction_input = bcma_gpio_direction_input;
chip->direction_output = bcma_gpio_direction_output;
chip->owner = THIS_MODULE;
- chip->dev = bcma_bus_get_host_dev(bus);
+ chip->parent = bcma_bus_get_host_dev(bus);
#if IS_BUILTIN(CONFIG_OF)
if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
chip->of_node = cc->core->dev.of_node;
}
idio16gpio->chip.label = NAME;
- idio16gpio->chip.dev = dev;
+ idio16gpio->chip.parent = dev;
idio16gpio->chip.owner = THIS_MODULE;
idio16gpio->chip.base = -1;
idio16gpio->chip.ngpio = 32;
static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
{
- struct spi_device *spi = to_spi_device(chip->gpio_chip.dev);
+ struct spi_device *spi = to_spi_device(chip->gpio_chip.parent);
struct spi_message message;
struct spi_transfer *msg_buf;
int i, ret = 0;
return -ENOMEM;
chip->gpio_chip.can_sleep = true;
- chip->gpio_chip.dev = &spi->dev;
+ chip->gpio_chip.parent = &spi->dev;
chip->gpio_chip.owner = THIS_MODULE;
mutex_init(&chip->lock);
err = i2c_smbus_read_byte_data(adnp->client, offset);
if (err < 0) {
- dev_err(adnp->gpio.dev, "%s failed: %d\n",
+ dev_err(adnp->gpio.parent, "%s failed: %d\n",
"i2c_smbus_read_byte_data()", err);
return err;
}
err = i2c_smbus_write_byte_data(adnp->client, offset, value);
if (err < 0) {
- dev_err(adnp->gpio.dev, "%s failed: %d\n",
+ dev_err(adnp->gpio.parent, "%s failed: %d\n",
"i2c_smbus_write_byte_data()", err);
return err;
}
chip->base = -1;
chip->ngpio = num_gpios;
chip->label = adnp->client->name;
- chip->dev = &adnp->client->dev;
- chip->of_node = chip->dev->of_node;
+ chip->parent = &adnp->client->dev;
+ chip->of_node = chip->parent->of_node;
chip->owner = THIS_MODULE;
err = gpiochip_add(chip);
* is chosen to match the register layout of the hardware in that
* each segment contains the corresponding bits for all interrupts.
*/
- adnp->irq_enable = devm_kzalloc(chip->dev, num_regs * 6, GFP_KERNEL);
+ adnp->irq_enable = devm_kzalloc(chip->parent, num_regs * 6,
+ GFP_KERNEL);
if (!adnp->irq_enable)
return -ENOMEM;
adnp->irq_enable[i] = 0x00;
}
- err = devm_request_threaded_irq(chip->dev, adnp->client->irq,
+ err = devm_request_threaded_irq(chip->parent, adnp->client->irq,
NULL, adnp_irq,
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
- dev_name(chip->dev), adnp);
+ dev_name(chip->parent), adnp);
if (err != 0) {
- dev_err(chip->dev, "can't request IRQ#%d: %d\n",
+ dev_err(chip->parent, "can't request IRQ#%d: %d\n",
adnp->client->irq, err);
return err;
}
handle_simple_irq,
IRQ_TYPE_NONE);
if (err) {
- dev_err(chip->dev,
+ dev_err(chip->parent,
"could not connect irqchip to gpiochip\n");
return err;
}
altera_gc->mmchip.gc.get = altera_gpio_get;
altera_gc->mmchip.gc.set = altera_gpio_set;
altera_gc->mmchip.gc.owner = THIS_MODULE;
- altera_gc->mmchip.gc.dev = &pdev->dev;
+ altera_gc->mmchip.gc.parent = &pdev->dev;
ret = of_mm_gpiochip_add(node, &altera_gc->mmchip);
if (ret) {
goto out;
}
gp.pdev = pdev;
- gp.chip.dev = &pdev->dev;
+ gp.chip.parent = &pdev->dev;
spin_lock_init(&gp.lock);
unsigned long flags;
u32 using_pins;
- dev_dbg(gc->dev, "pt_gpio_request offset=%x\n", offset);
+ dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset);
spin_lock_irqsave(&pt_gpio->lock, flags);
using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
if (using_pins & BIT(offset)) {
- dev_warn(gc->dev, "PT GPIO pin %x reconfigured\n",
- offset);
+ dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n",
+ offset);
spin_unlock_irqrestore(&pt_gpio->lock, flags);
return -EINVAL;
}
spin_unlock_irqrestore(&pt_gpio->lock, flags);
- dev_dbg(gc->dev, "pt_gpio_free offset=%x\n", offset);
+ dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset);
}
static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value)
unsigned long flags;
u32 data;
- dev_dbg(gc->dev, "pt_gpio_set_value offset=%x, value=%x\n",
+ dev_dbg(gc->parent, "pt_gpio_set_value offset=%x, value=%x\n",
offset, value);
spin_lock_irqsave(&pt_gpio->lock, flags);
data >>= offset;
data &= 1;
- dev_dbg(gc->dev, "pt_gpio_get_value offset=%x, value=%x\n",
+ dev_dbg(gc->parent, "pt_gpio_get_value offset=%x, value=%x\n",
offset, data);
return data;
unsigned long flags;
u32 data;
- dev_dbg(gc->dev, "pt_gpio_dirction_input offset=%x\n", offset);
+ dev_dbg(gc->parent, "pt_gpio_dirction_input offset=%x\n", offset);
spin_lock_irqsave(&pt_gpio->lock, flags);
unsigned long flags;
u32 data;
- dev_dbg(gc->dev, "pt_gpio_direction_output offset=%x, value=%x\n",
+ dev_dbg(gc->parent, "pt_gpio_direction_output offset=%x, value=%x\n",
offset, value);
spin_lock_irqsave(&pt_gpio->lock, flags);
pt_gpio->gc.label = pdev->name;
pt_gpio->gc.owner = THIS_MODULE;
- pt_gpio->gc.dev = dev;
+ pt_gpio->gc.parent = dev;
pt_gpio->gc.request = pt_gpio_request;
pt_gpio->gc.free = pt_gpio_free;
pt_gpio->gc.direction_input = pt_gpio_direction_input;
arizona_gpio->arizona = arizona;
arizona_gpio->gpio_chip = template_chip;
- arizona_gpio->gpio_chip.dev = &pdev->dev;
+ arizona_gpio->gpio_chip.parent = &pdev->dev;
#ifdef CONFIG_OF_GPIO
arizona_gpio->gpio_chip.of_node = arizona->dev->of_node;
#endif
spin_lock_init(&ctrl->lock);
memcpy(&ctrl->chip, &ath79_gpio_chip, sizeof(ctrl->chip));
- ctrl->chip.dev = &pdev->dev;
+ ctrl->chip.parent = &pdev->dev;
ctrl->chip.ngpio = ath79_gpio_count;
if (oe_inverted) {
ctrl->chip.direction_input = ar934x_gpio_direction_input;
reg_base = kona_gpio->reg_base;
/* debounce must be 1-128ms (or 0) */
if ((debounce > 0 && debounce < 1000) || debounce > 128000) {
- dev_err(chip->dev, "Debounce value %u not in range\n",
+ dev_err(chip->parent, "Debounce value %u not in range\n",
debounce);
return -EINVAL;
}
case IRQ_TYPE_LEVEL_LOW:
/* BCM GPIO doesn't support level triggering */
default:
- dev_err(kona_gpio->gpio_chip.dev,
+ dev_err(kona_gpio->gpio_chip.parent,
"Invalid BCM GPIO irq type 0x%x\n", type);
return -EINVAL;
}
struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d);
if (gpiochip_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) {
- dev_err(kona_gpio->gpio_chip.dev,
+ dev_err(kona_gpio->gpio_chip.parent,
"unable to lock HW IRQ %lu for IRQ\n",
d->hwirq);
return -EINVAL;
cg->chip.base = -1;
cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM;
cg->chip.can_sleep = true;
- cg->chip.dev = dev;
+ cg->chip.parent = dev;
cg->chip.dbg_show = crystalcove_gpio_dbg_show;
cg->regmap = pmic->regmap;
const struct of_phandle_args *gpiospec,
u32 *flags)
{
- struct davinci_gpio_controller *chips = dev_get_drvdata(gc->dev);
- struct davinci_gpio_platform_data *pdata = dev_get_platdata(gc->dev);
+ struct davinci_gpio_controller *chips = dev_get_drvdata(gc->parent);
+ struct davinci_gpio_platform_data *pdata = dev_get_platdata(gc->parent);
if (gpiospec->args[0] > pdata->ngpio)
return -EINVAL;
ret = dln2_gpio_set_event_cfg(dln2, pin, type, 0);
if (ret)
- dev_err(dln2->gpio.dev, "failed to set event\n");
+ dev_err(dln2->gpio.parent, "failed to set event\n");
}
mutex_unlock(&dln2->irq_lock);
struct dln2_gpio *dln2 = platform_get_drvdata(pdev);
if (len < sizeof(*event)) {
- dev_err(dln2->gpio.dev, "short event message\n");
+ dev_err(dln2->gpio.parent, "short event message\n");
return;
}
pin = le16_to_cpu(event->pin);
if (pin >= dln2->gpio.ngpio) {
- dev_err(dln2->gpio.dev, "out of bounds pin %d\n", pin);
+ dev_err(dln2->gpio.parent, "out of bounds pin %d\n", pin);
return;
}
irq = irq_find_mapping(dln2->gpio.irqdomain, pin);
if (!irq) {
- dev_err(dln2->gpio.dev, "pin %d not mapped to IRQ\n", pin);
+ dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);
return;
}
dln2->pdev = pdev;
dln2->gpio.label = "dln2";
- dln2->gpio.dev = dev;
+ dln2->gpio.parent = dev;
dln2->gpio.owner = THIS_MODULE;
dln2->gpio.base = -1;
dln2->gpio.ngpio = pins;
struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
if (gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) {
- dev_err(p->gpio_chip.dev,
+ dev_err(p->gpio_chip.parent,
"unable to lock HW IRQ %lu for IRQ\n",
irqd_to_hwirq(d));
return -EINVAL;
gpio_chip->request = em_gio_request;
gpio_chip->free = em_gio_free;
gpio_chip->label = name;
- gpio_chip->dev = &pdev->dev;
+ gpio_chip->parent = &pdev->dev;
gpio_chip->owner = THIS_MODULE;
gpio_chip->base = -1;
gpio_chip->ngpio = ngpios;
for (i = 0; i < data->nr_bank; i++) {
struct f7188x_gpio_bank *bank = &data->bank[i];
- bank->chip.dev = &pdev->dev;
+ bank->chip.parent = &pdev->dev;
bank->data = data;
err = gpiochip_add(&bank->chip);
return -EINVAL;
spin_lock_init(&bgc->lock);
- bgc->gc.dev = dev;
+ bgc->gc.parent = dev;
bgc->gc.label = dev_name(dev);
bgc->gc.base = -1;
bgc->gc.ngpio = bgc->bits;
{
chip->owner = THIS_MODULE;
chip->label = DRV_NAME;
- chip->dev = &ichx_priv.dev->dev;
+ chip->parent = &ichx_priv.dev->dev;
/* Allow chip-specific overrides of request()/get() */
chip->request = ichx_priv.desc->request ?
priv->reg_base = pcim_iomap_table(pdev)[0];
priv->chip.label = dev_name(&pdev->dev);
- priv->chip.dev = &pdev->dev;
+ priv->chip.parent = &pdev->dev;
priv->chip.request = intel_gpio_request;
priv->chip.direction_input = intel_gpio_direction_input;
priv->chip.direction_output = intel_gpio_direction_output;
static int ttl_get_value(struct gpio_chip *gpio, unsigned offset)
{
- struct ttl_module *mod = dev_get_drvdata(gpio->dev);
+ struct ttl_module *mod = dev_get_drvdata(gpio->parent);
u8 *shadow;
int ret;
static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value)
{
- struct ttl_module *mod = dev_get_drvdata(gpio->dev);
+ struct ttl_module *mod = dev_get_drvdata(gpio->parent);
void __iomem *port;
u8 *shadow;
/* Initialize the GPIO data structures */
gpio = &mod->gpio;
- gpio->dev = &pdev->dev;
+ gpio->parent = &pdev->dev;
gpio->label = pdev->name;
gpio->get = ttl_get_value;
gpio->set = ttl_set_value;
chip = &gpio->chip;
chip->label = "gpio-kempld";
chip->owner = THIS_MODULE;
- chip->dev = dev;
+ chip->parent = dev;
chip->can_sleep = true;
if (pdata && pdata->gpio_base)
chip->base = pdata->gpio_base;
lp3943_gpio->lp3943 = lp3943;
lp3943_gpio->chip = lp3943_gpio_chip;
- lp3943_gpio->chip.dev = &pdev->dev;
+ lp3943_gpio->chip.parent = &pdev->dev;
platform_set_drvdata(pdev, lp3943_gpio);
spin_lock_init(&gc->lock);
- gc->gpio.dev = &pdev->dev;
+ gc->gpio.parent = &pdev->dev;
ret = gpiochip_add(&gc->gpio);
if (ret) {
gc->base = -1;
gc->ngpio = LP_NUM_GPIO;
gc->can_sleep = false;
- gc->dev = dev;
+ gc->parent = dev;
ret = gpiochip_add(gc);
if (ret) {
ts->chip.ngpio = PIN_NUMBER;
ts->chip.can_sleep = true;
- ts->chip.dev = dev;
+ ts->chip.parent = dev;
ts->chip.owner = THIS_MODULE;
/*
gc->base = gpio_start;
gc->ngpio = port;
gc->label = chip->client->name;
- gc->dev = &chip->client->dev;
+ gc->parent = &chip->client->dev;
gc->owner = THIS_MODULE;
return port;
chip->client = client;
nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base);
- chip->gpio_chip.dev = &client->dev;
+ chip->gpio_chip.parent = &client->dev;
addr_a = (client->addr & 0x0f) | 0x60;
addr_b = (client->addr & 0x0f) | 0x50;
gchip->gc.label = dev_name(&pdev->dev);
gchip->gc.ngpio = 32;
gchip->gc.owner = THIS_MODULE;
- gchip->gc.dev = &pdev->dev;
+ gchip->gc.parent = &pdev->dev;
gchip->gc.base = -1;
platform_set_drvdata(pdev, gchip);
mc->chip.base = pdata->base;
mc->chip.ngpio = PIN_NUMBER;
mc->chip.can_sleep = true;
- mc->chip.dev = &spi->dev;
+ mc->chip.parent = &spi->dev;
mc->chip.owner = THIS_MODULE;
mc->port_config = 0x00;
mc9s->chip.label = client->name;
mc9s->chip.base = -1;
- mc9s->chip.dev = &client->dev;
+ mc9s->chip.parent = &client->dev;
mc9s->chip.owner = THIS_MODULE;
mc9s->chip.ngpio = GPIO_NUM;
mc9s->chip.can_sleep = true;
struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) {
- dev_err(mcp->chip.dev,
+ dev_err(mcp->chip.parent,
"unable to lock HW IRQ %lu for IRQ usage\n",
data->hwirq);
return -EINVAL;
mutex_init(&mcp->irq_lock);
- mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
+ mcp->irq_domain = irq_domain_add_linear(chip->parent->of_node,
+ chip->ngpio,
&irq_domain_simple_ops, mcp);
if (!mcp->irq_domain)
return -ENODEV;
else
irqflags |= IRQF_TRIGGER_LOW;
- err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
- irqflags, dev_name(chip->dev), mcp);
+ err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
+ mcp23s08_irq,
+ irqflags, dev_name(chip->parent), mcp);
if (err != 0) {
- dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
+ dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
mcp->irq, err);
return err;
}
mcp->chip.base = pdata->base;
mcp->chip.can_sleep = true;
- mcp->chip.dev = dev;
+ mcp->chip.parent = dev;
mcp->chip.owner = THIS_MODULE;
/* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
mcp->irq_controller = pdata->irq_controller;
if (mcp->irq && mcp->irq_controller) {
mcp->irq_active_high =
- of_property_read_bool(mcp->chip.dev->of_node,
+ of_property_read_bool(mcp->chip.parent->of_node,
"microchip,irq-active-high");
if (type == MCP_TYPE_017)
bgc->data = bgc->read_reg(bgc->reg_set);
bgc->gc.base = 0;
bgc->gc.ngpio = 32;
- bgc->gc.dev = dev;
+ bgc->gc.parent = dev;
bgc->gc.owner = THIS_MODULE;
ret = gpiochip_add(&bgc->gc);
mg->chip.base = pdata->gpio_base;
mg->chip.ngpio = MSIC_NUM_GPIO;
mg->chip.can_sleep = true;
- mg->chip.dev = dev;
+ mg->chip.parent = dev;
mutex_init(&mg->buslock);
mvchip->soc_variant = soc_variant;
mvchip->chip.label = dev_name(&pdev->dev);
- mvchip->chip.dev = &pdev->dev;
+ mvchip->chip.parent = &pdev->dev;
mvchip->chip.request = gpiochip_generic_request;
mvchip->chip.free = gpiochip_generic_free;
mvchip->chip.direction_input = mvebu_gpio_direction_input;
pdev->dev.platform_data = chip;
chip->label = "octeon-gpio";
- chip->dev = &pdev->dev;
+ chip->parent = &pdev->dev;
chip->owner = THIS_MODULE;
chip->base = 0;
chip->can_sleep = false;
if (bank->is_mpuio) {
bank->chip.label = "mpuio";
if (bank->regs->wkup_en)
- bank->chip.dev = &omap_mpuio_device.dev;
+ bank->chip.parent = &omap_mpuio_device.dev;
bank->chip.base = OMAP_MPUIO(0);
} else {
bank->chip.label = "gpio";
}
bank->dev = dev;
- bank->chip.dev = dev;
+ bank->chip.parent = dev;
bank->chip.owner = THIS_MODULE;
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val);
if (ret < 0) {
- dev_err(gc->dev, "Reg 0x%02x read failed, %d\n", reg, ret);
+ dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret);
return ret;
}
ret = palmas_read(palmas, PALMAS_GPIO_BASE, reg, &val);
if (ret < 0) {
- dev_err(gc->dev, "Reg 0x%02x read failed, %d\n", reg, ret);
+ dev_err(gc->parent, "Reg 0x%02x read failed, %d\n", reg, ret);
return ret;
}
return !!(val & BIT(offset));
ret = palmas_write(palmas, PALMAS_GPIO_BASE, reg, BIT(offset));
if (ret < 0)
- dev_err(gc->dev, "Reg 0x%02x write failed, %d\n", reg, ret);
+ dev_err(gc->parent, "Reg 0x%02x write failed, %d\n", reg, ret);
}
static int palmas_gpio_output(struct gpio_chip *gc, unsigned offset,
ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg,
BIT(offset), BIT(offset));
if (ret < 0)
- dev_err(gc->dev, "Reg 0x%02x update failed, %d\n", reg, ret);
+ dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg,
+ ret);
return ret;
}
ret = palmas_update_bits(palmas, PALMAS_GPIO_BASE, reg, BIT(offset), 0);
if (ret < 0)
- dev_err(gc->dev, "Reg 0x%02x update failed, %d\n", reg, ret);
+ dev_err(gc->parent, "Reg 0x%02x update failed, %d\n", reg,
+ ret);
return ret;
}
palmas_gpio->gpio_chip.to_irq = palmas_gpio_to_irq;
palmas_gpio->gpio_chip.set = palmas_gpio_set;
palmas_gpio->gpio_chip.get = palmas_gpio_get;
- palmas_gpio->gpio_chip.dev = &pdev->dev;
+ palmas_gpio->gpio_chip.parent = &pdev->dev;
#ifdef CONFIG_OF_GPIO
palmas_gpio->gpio_chip.of_node = pdev->dev.of_node;
#endif
gc->base = chip->gpio_start;
gc->ngpio = gpios;
gc->label = chip->client->name;
- gc->dev = &chip->client->dev;
+ gc->parent = &chip->client->dev;
gc->owner = THIS_MODULE;
gc->names = chip->names;
}
gpio->chip.base = pdata ? pdata->gpio_base : -1;
gpio->chip.can_sleep = true;
- gpio->chip.dev = &client->dev;
+ gpio->chip.parent = &client->dev;
gpio->chip.owner = THIS_MODULE;
gpio->chip.get = pcf857x_get;
gpio->chip.set = pcf857x_set;
struct gpio_chip *gpio = &chip->gpio;
gpio->label = dev_name(chip->dev);
- gpio->dev = chip->dev;
+ gpio->parent = chip->dev;
gpio->owner = THIS_MODULE;
gpio->direction_input = pch_gpio_direction_input;
gpio->get = pch_gpio_get;
if ((trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) &&
(trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)))
{
- dev_err(gc->dev,
+ dev_err(gc->parent,
"trying to configure line %d for both level and edge "
"detection, choose one!\n",
offset);
else
gpioiev &= ~bit;
irq_set_handler_locked(d, handle_level_irq);
- dev_dbg(gc->dev, "line %d: IRQ on %s level\n",
+ dev_dbg(gc->parent, "line %d: IRQ on %s level\n",
offset,
polarity ? "HIGH" : "LOW");
} else if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
/* Select both edges, setting this makes GPIOEV be ignored */
gpioibe |= bit;
irq_set_handler_locked(d, handle_edge_irq);
- dev_dbg(gc->dev, "line %d: IRQ on both edges\n", offset);
+ dev_dbg(gc->parent, "line %d: IRQ on both edges\n", offset);
} else if ((trigger & IRQ_TYPE_EDGE_RISING) ||
(trigger & IRQ_TYPE_EDGE_FALLING)) {
bool rising = trigger & IRQ_TYPE_EDGE_RISING;
else
gpioiev &= ~bit;
irq_set_handler_locked(d, handle_edge_irq);
- dev_dbg(gc->dev, "line %d: IRQ on %s edge\n",
+ dev_dbg(gc->parent, "line %d: IRQ on %s edge\n",
offset,
rising ? "RISING" : "FALLING");
} else {
gpioibe &= ~bit;
gpioiev &= ~bit;
irq_set_handler_locked(d, handle_bad_irq);
- dev_warn(gc->dev, "no trigger selected for line %d\n",
+ dev_warn(gc->parent, "no trigger selected for line %d\n",
offset);
}
chip->gc.set = pl061_set_value;
chip->gc.ngpio = PL061_GPIO_NR;
chip->gc.label = dev_name(dev);
- chip->gc.dev = dev;
+ chip->gc.parent = dev;
chip->gc.owner = THIS_MODULE;
ret = gpiochip_add(&chip->gc);
rc5t583_gpio->gpio_chip.to_irq = rc5t583_gpio_to_irq,
rc5t583_gpio->gpio_chip.ngpio = RC5T583_MAX_GPIO,
rc5t583_gpio->gpio_chip.can_sleep = true,
- rc5t583_gpio->gpio_chip.dev = &pdev->dev;
+ rc5t583_gpio->gpio_chip.parent = &pdev->dev;
rc5t583_gpio->gpio_chip.base = -1;
rc5t583_gpio->rc5t583 = rc5t583;
gpio_chip->direction_output = gpio_rcar_direction_output;
gpio_chip->set = gpio_rcar_set;
gpio_chip->label = name;
- gpio_chip->dev = dev;
+ gpio_chip->parent = dev;
gpio_chip->owner = THIS_MODULE;
gpio_chip->base = p->config.gpio_base;
gpio_chip->ngpio = p->config.number_of_pins;
sch->iobase = res->start;
sch->chip = sch_gpio_chip;
sch->chip.label = dev_name(&pdev->dev);
- sch->chip.dev = &pdev->dev;
+ sch->chip.parent = &pdev->dev;
switch (pdev->id) {
case PCI_DEVICE_ID_INTEL_SCH_LPC:
if (!request_region(block->runtime_reg + block->config_regs[offset],
1, DRV_NAME)) {
- dev_err(chip->dev, "Failed to request region 0x%04x.\n",
+ dev_err(chip->parent, "Failed to request region 0x%04x.\n",
block->runtime_reg + block->config_regs[offset]);
return -EBUSY;
}
block->chip.get = sch311x_gpio_get;
block->chip.set = sch311x_gpio_set;
block->chip.ngpio = 8;
- block->chip.dev = &pdev->dev;
+ block->chip.parent = &pdev->dev;
block->chip.base = sch311x_gpio_blocks[i].base;
block->config_regs = sch311x_gpio_blocks[i].config_regs;
block->data_reg = sch311x_gpio_blocks[i].data_reg;
spics->chip.get = spics_get_value;
spics->chip.set = spics_set_value;
spics->chip.label = dev_name(&pdev->dev);
- spics->chip.dev = &pdev->dev;
+ spics->chip.parent = &pdev->dev;
spics->chip.owner = THIS_MODULE;
spics->last_off = -1;
stmpe_gpio->stmpe = stmpe;
stmpe_gpio->chip = template_chip;
stmpe_gpio->chip.ngpio = stmpe->num_gpios;
- stmpe_gpio->chip.dev = &pdev->dev;
+ stmpe_gpio->chip.parent = &pdev->dev;
stmpe_gpio->chip.of_node = np;
stmpe_gpio->chip.base = -1;
container_of(gc, struct xway_stp, gc);
if ((gpio < 8) && (chip->reserved & BIT(gpio))) {
- dev_err(gc->dev, "GPIO %d is driven by hardware\n", gpio);
+ dev_err(gc->parent, "GPIO %d is driven by hardware\n", gpio);
return -ENODEV;
}
if (IS_ERR(chip->virt))
return PTR_ERR(chip->virt);
- chip->gc.dev = &pdev->dev;
+ chip->gc.parent = &pdev->dev;
chip->gc.label = "stp-xway";
chip->gc.direction_output = xway_stp_dir_out;
chip->gc.set = xway_stp_set;
chip->client = client;
chip->dev_cfg = &sx150x_devices[driver_data];
- chip->gpio_chip.dev = &client->dev;
+ chip->gpio_chip.parent = &client->dev;
chip->gpio_chip.label = client->name;
chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT,
BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT);
if (ret < 0)
- dev_err(chip->dev, "gpio write failed ret(%d)\n", ret);
+ dev_err(chip->parent, "gpio write failed ret(%d)\n", ret);
}
static const struct syscon_gpio_data keystone_dsp_gpio = {
priv->dir_reg_offset <<= 3;
}
- priv->chip.dev = dev;
+ priv->chip.parent = dev;
priv->chip.owner = THIS_MODULE;
priv->chip.label = dev_name(dev);
priv->chip.base = -1;
return PTR_ERR(tb10x_gpio->base);
tb10x_gpio->gc.label = of_node_full_name(dn);
- tb10x_gpio->gc.dev = &pdev->dev;
+ tb10x_gpio->gc.parent = &pdev->dev;
tb10x_gpio->gc.owner = THIS_MODULE;
tb10x_gpio->gc.direction_input = tb10x_gpio_direction_in;
tb10x_gpio->gc.get = tb10x_gpio_get;
tc3589x_gpio->chip = template_chip;
tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
- tc3589x_gpio->chip.dev = &pdev->dev;
+ tc3589x_gpio->chip.parent = &pdev->dev;
tc3589x_gpio->chip.base = -1;
tc3589x_gpio->chip.of_node = np;
gc->label = dev_name(&pdev->dev);
gc->owner = THIS_MODULE;
- gc->dev = &pdev->dev;
+ gc->parent = &pdev->dev;
gc->direction_input = timbgpio_gpio_direction_input;
gc->get = timbgpio_gpio_get;
gc->direction_output = timbgpio_gpio_direction_output;
tps6586x_gpio->gpio_chip.owner = THIS_MODULE;
tps6586x_gpio->gpio_chip.label = pdev->name;
- tps6586x_gpio->gpio_chip.dev = &pdev->dev;
+ tps6586x_gpio->gpio_chip.parent = &pdev->dev;
tps6586x_gpio->gpio_chip.ngpio = 4;
tps6586x_gpio->gpio_chip.can_sleep = true;
tps65910_gpio->gpio_chip.direction_output = tps65910_gpio_output;
tps65910_gpio->gpio_chip.set = tps65910_gpio_set;
tps65910_gpio->gpio_chip.get = tps65910_gpio_get;
- tps65910_gpio->gpio_chip.dev = &pdev->dev;
+ tps65910_gpio->gpio_chip.parent = &pdev->dev;
#ifdef CONFIG_OF_GPIO
tps65910_gpio->gpio_chip.of_node = tps65910->dev->of_node;
#endif
tps65912_gpio->tps65912 = tps65912;
tps65912_gpio->gpio_chip = template_chip;
- tps65912_gpio->gpio_chip.dev = &pdev->dev;
+ tps65912_gpio->gpio_chip.parent = &pdev->dev;
if (pdata && pdata->gpio_base)
tps65912_gpio->gpio_chip.base = pdata->gpio_base;
else if (priv->hwirq == 1)
ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */
else
- dev_err(priv->gpio_chip.dev, "invalid hwirq %d\n", priv->hwirq);
+ dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n",
+ priv->hwirq);
spin_unlock_irqrestore(&priv->lock, flags);
}
priv->gpio_chip.owner = THIS_MODULE;
priv->gpio_chip.label = name;
- priv->gpio_chip.dev = dev;
+ priv->gpio_chip.parent = dev;
priv->gpio_chip.direction_input = ts5500_gpio_input;
priv->gpio_chip.direction_output = ts5500_gpio_output;
priv->gpio_chip.get = ts5500_gpio_get;
/* optionally have the first two GPIOs switch vMMC1
* and vMMC2 power supplies based on card presence.
*/
- pdata = dev_get_platdata(chip->dev);
+ pdata = dev_get_platdata(chip->parent);
if (pdata)
value |= pdata->mmc_cd & 0x03;
priv->gpio_chip = template_chip;
priv->gpio_chip.base = -1;
priv->gpio_chip.ngpio = TWL4030_GPIO_MAX;
- priv->gpio_chip.dev = &pdev->dev;
+ priv->gpio_chip.parent = &pdev->dev;
mutex_init(&priv->mutex);
static int twl6040gpo_get(struct gpio_chip *chip, unsigned offset)
{
- struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent);
+ struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent);
int ret = 0;
ret = twl6040_reg_read(twl6040, TWL6040_REG_GPOCTL);
static void twl6040gpo_set(struct gpio_chip *chip, unsigned offset, int value)
{
- struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent);
+ struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent);
int ret;
u8 gpoctl;
else
twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */
- twl6040gpo_chip.dev = &pdev->dev;
+ twl6040gpo_chip.parent = &pdev->dev;
#ifdef CONFIG_OF_GPIO
twl6040gpo_chip.of_node = twl6040_core_dev->of_node;
#endif
/* Set up GPIO chip */
priv->chip.label = "tz1090-pdc-gpio";
- priv->chip.dev = &pdev->dev;
+ priv->chip.parent = &pdev->dev;
priv->chip.direction_input = tz1090_pdc_gpio_direction_input;
priv->chip.direction_output = tz1090_pdc_gpio_direction_output;
priv->chip.get = tz1090_pdc_gpio_get;
snprintf(bank->label, sizeof(bank->label), "tz1090-gpio-%u",
info->index);
bank->chip.label = bank->label;
- bank->chip.dev = dev;
+ bank->chip.parent = dev;
bank->chip.direction_input = tz1090_gpio_direction_input;
bank->chip.direction_output = tz1090_gpio_direction_output;
bank->chip.get = tz1090_gpio_get;
gc = &port->gc;
gc->of_node = np;
- gc->dev = dev;
+ gc->parent = dev;
gc->label = "vf610-gpio";
gc->ngpio = VF610_GPIO_PER_PORT;
gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpioa_msg))
- dev_err(chip->dev, "usb error setting pin value\n");
+ dev_err(chip->parent, "usb error setting pin value\n");
}
}
mutex_unlock(&vb->lock);
if (ret != sizeof(struct vprbrd_gpiob_msg))
- dev_err(chip->dev, "usb error setting pin value\n");
+ dev_err(chip->parent, "usb error setting pin value\n");
}
}
mutex_unlock(&vb->lock);
if (ret)
- dev_err(chip->dev, "usb error setting pin to input\n");
+ dev_err(chip->parent, "usb error setting pin to input\n");
return ret;
}
ret = vprbrd_gpiob_setdir(vb, offset, 1);
if (ret)
- dev_err(chip->dev, "usb error setting pin to output\n");
+ dev_err(chip->parent, "usb error setting pin to output\n");
mutex_unlock(&vb->lock);
vb_gpio->vb = vb;
/* registering gpio a */
vb_gpio->gpioa.label = "viperboard gpio a";
- vb_gpio->gpioa.dev = &pdev->dev;
+ vb_gpio->gpioa.parent = &pdev->dev;
vb_gpio->gpioa.owner = THIS_MODULE;
vb_gpio->gpioa.base = -1;
vb_gpio->gpioa.ngpio = 16;
vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output;
ret = gpiochip_add(&vb_gpio->gpioa);
if (ret < 0) {
- dev_err(vb_gpio->gpioa.dev, "could not add gpio a");
+ dev_err(vb_gpio->gpioa.parent, "could not add gpio a");
goto err_gpioa;
}
/* registering gpio b */
vb_gpio->gpiob.label = "viperboard gpio b";
- vb_gpio->gpiob.dev = &pdev->dev;
+ vb_gpio->gpiob.parent = &pdev->dev;
vb_gpio->gpiob.owner = THIS_MODULE;
vb_gpio->gpiob.base = -1;
vb_gpio->gpiob.ngpio = 16;
vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output;
ret = gpiochip_add(&vb_gpio->gpiob);
if (ret < 0) {
- dev_err(vb_gpio->gpiob.dev, "could not add gpio b");
+ dev_err(vb_gpio->gpiob.parent, "could not add gpio b");
goto err_gpiob;
}
static unsigned int startup_giuint(struct irq_data *data)
{
if (gpiochip_lock_as_irq(&vr41xx_gpio_chip, data->hwirq))
- dev_err(vr41xx_gpio_chip.dev,
+ dev_err(vr41xx_gpio_chip.parent,
"unable to lock HW IRQ %lu for IRQ\n",
data->hwirq);
/* Satisfy the .enable semantics by unmasking the line */
if (!giu_base)
return -ENOMEM;
- vr41xx_gpio_chip.dev = &pdev->dev;
+ vr41xx_gpio_chip.parent = &pdev->dev;
ret = gpiochip_add(&vr41xx_gpio_chip);
if (!ret) {
wm831x_gpio->wm831x = wm831x;
wm831x_gpio->gpio_chip = template_chip;
wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio;
- wm831x_gpio->gpio_chip.dev = &pdev->dev;
+ wm831x_gpio->gpio_chip.parent = &pdev->dev;
if (pdata && pdata->gpio_base)
wm831x_gpio->gpio_chip.base = pdata->gpio_base;
else
wm8350_gpio->wm8350 = wm8350;
wm8350_gpio->gpio_chip = template_chip;
wm8350_gpio->gpio_chip.ngpio = 13;
- wm8350_gpio->gpio_chip.dev = &pdev->dev;
+ wm8350_gpio->gpio_chip.parent = &pdev->dev;
if (pdata && pdata->gpio_base)
wm8350_gpio->gpio_chip.base = pdata->gpio_base;
else
wm8994_gpio->wm8994 = wm8994;
wm8994_gpio->gpio_chip = template_chip;
wm8994_gpio->gpio_chip.ngpio = WM8994_GPIO_MAX;
- wm8994_gpio->gpio_chip.dev = &pdev->dev;
+ wm8994_gpio->gpio_chip.parent = &pdev->dev;
if (pdata && pdata->gpio_base)
wm8994_gpio->gpio_chip.base = pdata->gpio_base;
else
gpio->chip.ngpio = XGENE_MAX_GPIOS;
spin_lock_init(&gpio->lock);
- gpio->chip.dev = &pdev->dev;
+ gpio->chip.parent = &pdev->dev;
gpio->chip.direction_input = xgene_gpio_dir_in;
gpio->chip.direction_output = xgene_gpio_dir_out;
gpio->chip.get = xgene_gpio_get;
}
chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
- chip->mmchip.gc.dev = &pdev->dev;
+ chip->mmchip.gc.parent = &pdev->dev;
chip->mmchip.gc.direction_input = xgpio_dir_in;
chip->mmchip.gc.direction_output = xgpio_dir_out;
chip->mmchip.gc.get = xgpio_get;
gc->owner = THIS_MODULE;
gc->label = dev_name(&pdev->dev);
gc->base = 0;
- gc->dev = &pdev->dev;
+ gc->parent = &pdev->dev;
gc->ngpio = ngpio;
gc->of_node = pdev->dev.of_node;
gc->direction_output = xlp_gpio_dir_output;
/* Copy our reference */
controller->chip.gc = zevio_gpio_chip;
- controller->chip.gc.dev = &pdev->dev;
+ controller->chip.gc.parent = &pdev->dev;
status = of_mm_gpiochip_add(pdev->dev.of_node, &(controller->chip));
if (status) {
for (i = 0; i < controller->chip.gc.ngpio; i += 8)
zevio_gpio_port_set(controller, i, ZEVIO_GPIO_INT_MASK, 0xFF);
- dev_dbg(controller->chip.gc.dev, "ZEVIO GPIO controller set up!\n");
+ dev_dbg(controller->chip.gc.parent, "ZEVIO GPIO controller set up!\n");
return 0;
}
chip->gc.base = ZX_GPIO_NR * id;
chip->gc.ngpio = ZX_GPIO_NR;
chip->gc.label = dev_name(dev);
- chip->gc.dev = dev;
+ chip->gc.parent = dev;
chip->gc.owner = THIS_MODULE;
ret = gpiochip_add(&chip->gc);
{
int ret;
- ret = pm_runtime_get_sync(chip->dev);
+ ret = pm_runtime_get_sync(chip->parent);
/*
* If the device is already active pm_runtime_get() will return 1 on
static void zynq_gpio_free(struct gpio_chip *chip, unsigned offset)
{
- pm_runtime_put(chip->dev);
+ pm_runtime_put(chip->parent);
}
static const struct dev_pm_ops zynq_gpio_dev_pm_ops = {
chip = &gpio->chip;
chip->label = gpio->p_data->label;
chip->owner = THIS_MODULE;
- chip->dev = &pdev->dev;
+ chip->parent = &pdev->dev;
chip->get = zynq_gpio_get_value;
chip->set = zynq_gpio_set_value;
chip->request = zynq_gpio_request;
static int acpi_gpiochip_find(struct gpio_chip *gc, void *data)
{
- if (!gc->dev)
+ if (!gc->parent)
return false;
- return ACPI_HANDLE(gc->dev) == data;
+ return ACPI_HANDLE(gc->parent) == data;
}
#ifdef CONFIG_PINCTRL
if (agpio->connection_type != ACPI_RESOURCE_GPIO_TYPE_INT)
return AE_OK;
- handle = ACPI_HANDLE(chip->dev);
+ handle = ACPI_HANDLE(chip->parent);
pin = agpio->pin_table[0];
if (pin <= 255) {
desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event");
if (IS_ERR(desc)) {
- dev_err(chip->dev, "Failed to request GPIO\n");
+ dev_err(chip->parent, "Failed to request GPIO\n");
return AE_ERROR;
}
ret = gpiochip_lock_as_irq(chip, pin);
if (ret) {
- dev_err(chip->dev, "Failed to lock GPIO as interrupt\n");
+ dev_err(chip->parent, "Failed to lock GPIO as interrupt\n");
goto fail_free_desc;
}
irq = gpiod_to_irq(desc);
if (irq < 0) {
- dev_err(chip->dev, "Failed to translate GPIO to IRQ\n");
+ dev_err(chip->parent, "Failed to translate GPIO to IRQ\n");
goto fail_unlock_irq;
}
ret = request_threaded_irq(event->irq, NULL, handler, irqflags,
"ACPI:Event", event);
if (ret) {
- dev_err(chip->dev, "Failed to setup interrupt handler for %d\n",
+ dev_err(chip->parent,
+ "Failed to setup interrupt handler for %d\n",
event->irq);
goto fail_free_event;
}
acpi_handle handle;
acpi_status status;
- if (!chip->dev || !chip->to_irq)
+ if (!chip->parent || !chip->to_irq)
return;
- handle = ACPI_HANDLE(chip->dev);
+ handle = ACPI_HANDLE(chip->parent);
if (!handle)
return;
acpi_handle handle;
acpi_status status;
- if (!chip->dev || !chip->to_irq)
+ if (!chip->parent || !chip->to_irq)
return;
- handle = ACPI_HANDLE(chip->dev);
+ handle = ACPI_HANDLE(chip->parent);
if (!handle)
return;
static void acpi_gpiochip_request_regions(struct acpi_gpio_chip *achip)
{
struct gpio_chip *chip = achip->chip;
- acpi_handle handle = ACPI_HANDLE(chip->dev);
+ acpi_handle handle = ACPI_HANDLE(chip->parent);
acpi_status status;
INIT_LIST_HEAD(&achip->conns);
acpi_gpio_adr_space_handler,
NULL, achip);
if (ACPI_FAILURE(status))
- dev_err(chip->dev, "Failed to install GPIO OpRegion handler\n");
+ dev_err(chip->parent,
+ "Failed to install GPIO OpRegion handler\n");
}
static void acpi_gpiochip_free_regions(struct acpi_gpio_chip *achip)
{
struct gpio_chip *chip = achip->chip;
- acpi_handle handle = ACPI_HANDLE(chip->dev);
+ acpi_handle handle = ACPI_HANDLE(chip->parent);
struct acpi_gpio_connection *conn, *tmp;
acpi_status status;
status = acpi_remove_address_space_handler(handle, ACPI_ADR_SPACE_GPIO,
acpi_gpio_adr_space_handler);
if (ACPI_FAILURE(status)) {
- dev_err(chip->dev, "Failed to remove GPIO OpRegion handler\n");
+ dev_err(chip->parent,
+ "Failed to remove GPIO OpRegion handler\n");
return;
}
acpi_handle handle;
acpi_status status;
- if (!chip || !chip->dev)
+ if (!chip || !chip->parent)
return;
- handle = ACPI_HANDLE(chip->dev);
+ handle = ACPI_HANDLE(chip->parent);
if (!handle)
return;
acpi_gpio = kzalloc(sizeof(*acpi_gpio), GFP_KERNEL);
if (!acpi_gpio) {
- dev_err(chip->dev,
+ dev_err(chip->parent,
"Failed to allocate memory for ACPI GPIO chip\n");
return;
}
status = acpi_attach_data(handle, acpi_gpio_chip_dh, acpi_gpio);
if (ACPI_FAILURE(status)) {
- dev_err(chip->dev, "Failed to attach ACPI GPIO chip\n");
+ dev_err(chip->parent, "Failed to attach ACPI GPIO chip\n");
kfree(acpi_gpio);
return;
}
acpi_handle handle;
acpi_status status;
- if (!chip || !chip->dev)
+ if (!chip || !chip->parent)
return;
- handle = ACPI_HANDLE(chip->dev);
+ handle = ACPI_HANDLE(chip->parent);
if (!handle)
return;
status = acpi_get_data(handle, acpi_gpio_chip_dh, (void **)&acpi_gpio);
if (ACPI_FAILURE(status)) {
- dev_warn(chip->dev, "Failed to retrieve ACPI GPIO chip\n");
+ dev_warn(chip->parent, "Failed to retrieve ACPI GPIO chip\n");
return;
}
{
int status;
- if ((!chip->of_node) && (chip->dev))
- chip->of_node = chip->dev->of_node;
+ if ((!chip->of_node) && (chip->parent))
+ chip->of_node = chip->parent->of_node;
if (!chip->of_node)
return 0;
if (chip->names && chip->names[offset])
ioname = chip->names[offset];
- dev = device_create_with_groups(&gpio_class, chip->dev,
+ dev = device_create_with_groups(&gpio_class, chip->parent,
MKDEV(0, 0), data, gpio_groups,
ioname ? ioname : "gpio%u",
desc_to_gpio(desc));
return 0;
/* use chip->base for the ID; it's already known to be unique */
- dev = device_create_with_groups(&gpio_class, chip->dev, MKDEV(0, 0),
+ dev = device_create_with_groups(&gpio_class, chip->parent,
+ MKDEV(0, 0),
chip, gpiochip_groups,
"gpiochip%d", chip->base);
if (IS_ERR(dev))
if (pos != &gpio_chips && pos->prev != &gpio_chips) {
_chip = list_entry(pos->prev, struct gpio_chip, list);
if (_chip->base + _chip->ngpio > chip->base) {
- dev_err(chip->dev,
- "GPIO integer space overlap, cannot add chip\n");
+ dev_err(chip->parent,
+ "GPIO integer space overlap, cannot add chip\n");
err = -EBUSY;
}
}
gpio = gpio_name_to_desc(gc->names[i]);
if (gpio)
- dev_warn(gc->dev, "Detected name collision for "
+ dev_warn(gc->parent, "Detected name collision for "
"GPIO name '%s'\n",
gc->names[i]);
}
INIT_LIST_HEAD(&chip->pin_ranges);
#endif
- if (!chip->owner && chip->dev && chip->dev->driver)
- chip->owner = chip->dev->driver->owner;
+ if (!chip->owner && chip->parent && chip->parent->driver)
+ chip->owner = chip->parent->driver->owner;
status = gpiochip_set_desc_names(chip);
if (status)
spin_unlock_irqrestore(&gpio_lock, flags);
if (requested)
- dev_crit(chip->dev, "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
+ dev_crit(chip->parent,
+ "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
kfree(chip->desc);
chip->desc = NULL;
if (!gpiochip || !irqchip)
return -EINVAL;
- if (!gpiochip->dev) {
+ if (!gpiochip->parent) {
pr_err("missing gpiochip .dev parent pointer\n");
return -EINVAL;
}
- of_node = gpiochip->dev->of_node;
+ of_node = gpiochip->parent->of_node;
#ifdef CONFIG_OF_GPIO
/*
* If the gpiochip has an assigned OF node this takes precedence
seq_printf(s, "%sGPIOs %d-%d", (char *)s->private,
chip->base, chip->base + chip->ngpio - 1);
- dev = chip->dev;
+ dev = chip->parent;
if (dev)
seq_printf(s, ", %s/%s", dev->bus ? dev->bus->name : "no-bus",
dev_name(dev));
dev->gc.base = -1;
dev->gc.ngpio = 8;
dev->gc.can_sleep = 1;
- dev->gc.dev = &hdev->dev;
+ dev->gc.parent = &hdev->dev;
ret = gpiochip_add(&dev->gc);
if (ret < 0) {
ts->gc.ngpio = 1;
ts->gc.label = "AD7879-GPIO";
ts->gc.owner = THIS_MODULE;
- ts->gc.dev = ts->dev;
+ ts->gc.parent = ts->dev;
ret = gpiochip_add(&ts->gc);
if (ret)
}
#ifdef CONFIG_LEDS_PCA9532_GPIO
- if (data->gpio.dev)
+ if (data->gpio.parent)
gpiochip_remove(&data->gpio);
#endif
data->gpio.can_sleep = 1;
data->gpio.base = pdata->gpio_base;
data->gpio.ngpio = data->chip_info->num_leds;
- data->gpio.dev = &client->dev;
+ data->gpio.parent = &client->dev;
data->gpio.owner = THIS_MODULE;
err = gpiochip_add(&data->gpio);
if (err) {
/* Use data->gpio.dev as a flag for freeing gpiochip */
- data->gpio.dev = NULL;
+ data->gpio.parent = NULL;
dev_warn(&client->dev, "could not add gpiochip\n");
} else {
dev_info(&client->dev, "gpios %i...%i\n",
tca->gpio.owner = THIS_MODULE;
tca->gpio.direction_output = tca6507_gpio_direction_output;
tca->gpio.set = tca6507_gpio_set_value;
- tca->gpio.dev = &client->dev;
+ tca->gpio.parent = &client->dev;
#ifdef CONFIG_OF_GPIO
tca->gpio.of_node = of_node_get(client->dev.of_node);
#endif
#ifdef CONFIG_GPIOLIB
/* add GPIOs */
priv->gpio_chip.label = KBUILD_MODNAME;
- priv->gpio_chip.dev = &priv->i2c->dev;
+ priv->gpio_chip.parent = &priv->i2c->dev;
priv->gpio_chip.owner = THIS_MODULE;
priv->gpio_chip.direction_output =
cxd2820r_gpio_direction_output;
int i;
/* GPIO-ish stuff */
- dm355evm_msp_gpio.dev = &client->dev;
+ dm355evm_msp_gpio.parent = &client->dev;
status = gpiochip_add(&dm355evm_msp_gpio);
if (status < 0)
return status;
ei->chip[i].dev = &(pdev->dev);
chip = &(ei->chip[i].chip);
chip->label = "htc-egpio";
- chip->dev = &pdev->dev;
+ chip->parent = &pdev->dev;
chip->owner = THIS_MODULE;
chip->get = egpio_get;
chip->set = egpio_set;
/* Setup the GPIO chips */
gpio_chip = &(chip->chip_out);
gpio_chip->label = "htcpld-out";
- gpio_chip->dev = dev;
+ gpio_chip->parent = dev;
gpio_chip->owner = THIS_MODULE;
gpio_chip->get = htcpld_chip_get;
gpio_chip->set = htcpld_chip_set;
gpio_chip = &(chip->chip_in);
gpio_chip->label = "htcpld-in";
- gpio_chip->dev = dev;
+ gpio_chip->parent = dev;
gpio_chip->owner = THIS_MODULE;
gpio_chip->get = htcpld_chip_get;
gpio_chip->set = NULL;
tps->outmask = board->outmask;
tps->chip.label = client->name;
- tps->chip.dev = &client->dev;
+ tps->chip.parent = &client->dev;
tps->chip.owner = THIS_MODULE;
tps->chip.set = tps65010_gpio_set;
if (pdata && pdata->gpio_base) {
ucb->gpio.label = dev_name(&ucb->dev);
- ucb->gpio.dev = &ucb->dev;
+ ucb->gpio.parent = &ucb->dev;
ucb->gpio.owner = THIS_MODULE;
ucb->gpio.base = pdata->gpio_base;
ucb->gpio.ngpio = 10;
static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->parent);
return bcm2835_gpio_get_bit(pc, GPLEV0, offset);
}
static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->parent);
bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);
}
static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
- struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+ struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->parent);
return irq_linear_revmap(pc->irq_domain, offset);
}
return PTR_ERR(pc->base);
pc->gpio_chip = bcm2835_gpio_chip;
- pc->gpio_chip.dev = dev;
+ pc->gpio_chip.parent = dev;
pc->gpio_chip.of_node = np;
pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS,
gc->ngpio = ngpios;
chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK;
gc->label = dev_name(dev);
- gc->dev = dev;
+ gc->parent = dev;
gc->of_node = dev->of_node;
gc->request = cygnus_gpio_request;
gc->free = cygnus_gpio_free;
gc->dbg_show = byt_gpio_dbg_show;
gc->base = -1;
gc->can_sleep = false;
- gc->dev = dev;
+ gc->parent = dev;
#ifdef CONFIG_PM_SLEEP
vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio,
chip->ngpio = pctrl->community->ngpios;
chip->label = dev_name(pctrl->dev);
- chip->dev = pctrl->dev;
+ chip->parent = pctrl->dev;
chip->base = -1;
ret = gpiochip_add(chip);
pctrl->chip.ngpio = pctrl->soc->npins;
pctrl->chip.label = dev_name(pctrl->dev);
- pctrl->chip.dev = pctrl->dev;
+ pctrl->chip.parent = pctrl->dev;
pctrl->chip.base = -1;
ret = gpiochip_add(&pctrl->chip);
{
unsigned int reg_addr;
unsigned int bit;
- struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;
bit = BIT(offset & 0xf);
unsigned int bit;
unsigned int read_val = 0;
- struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
bit = BIT(offset & 0xf);
unsigned int reg_addr;
unsigned int bit;
unsigned int read_val = 0;
- struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
if (mtk_gpio_get_direction(chip, offset))
reg_addr = mtk_get_port(pctl, offset) +
static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
const struct mtk_desc_pin *pin;
- struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
int irq;
pin = pctl->devdata->pins + offset;
static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
unsigned debounce)
{
- struct mtk_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
int eint_num, virq, eint_offset;
unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc;
static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256};
*pctl->chip = mtk_gpio_chip;
pctl->chip->ngpio = pctl->devdata->npins;
pctl->chip->label = dev_name(&pdev->dev);
- pctl->chip->dev = &pdev->dev;
+ pctl->chip->parent = &pdev->dev;
pctl->chip->base = -1;
ret = gpiochip_add(pctl->chip);
domain = &pc->domains[i];
domain->chip.label = domain->data->name;
- domain->chip.dev = pc->dev;
+ domain->chip.parent = pc->dev;
domain->chip.request = meson_gpio_request;
domain->chip.free = meson_gpio_free;
domain->chip.direction_input = meson_gpio_direction_input;
param = pinconf_to_config_param(configs[i]);
argument = pinconf_to_config_argument(configs[i]);
- dev_dbg(chip->dev, "pin %d [%#lx]: %s %s\n",
+ dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
pin, configs[i],
(param == PIN_CONFIG_OUTPUT) ? "output " : "input",
(param == PIN_CONFIG_OUTPUT) ?
break;
default:
- dev_err(chip->dev, "illegal configuration requested\n");
+ dev_err(chip->parent,
+ "illegal configuration requested\n");
}
} /* for each config */
out:
pct->dev = &pdev->dev;
pct->parent = dev_get_drvdata(pdev->dev.parent);
pct->chip = abx500gpio_chip;
- pct->chip.dev = &pdev->dev;
+ pct->chip.parent = &pdev->dev;
pct->chip.base = -1; /* Dynamic allocation */
match = of_match_device(abx500_gpio_match, &pdev->dev);
nmk_chip->addr + NMK_GPIO_FIMSC);
}
- dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio);
+ dev_dbg(nmk_chip->chip.parent, "%d: clearing interrupt mask\n", gpio);
}
static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value)
chip->base = id * NMK_GPIO_PER_CHIP;
chip->ngpio = NMK_GPIO_PER_CHIP;
chip->label = dev_name(&gpio_pdev->dev);
- chip->dev = &gpio_pdev->dev;
+ chip->parent = &gpio_pdev->dev;
res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(&pdev->dev, res);
if (slpm_val)
val = slpm_val - 1;
- dev_dbg(nmk_chip->chip.dev,
+ dev_dbg(nmk_chip->chip.parent,
"pin %d: sleep pull %s, dir %s, val %s\n",
pin,
slpm_pull ? pullnames[pull] : "same",
slpm_val ? (val ? "high" : "low") : "same");
}
- dev_dbg(nmk_chip->chip.dev,
+ dev_dbg(nmk_chip->chip.parent,
"pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",
pin, cfg, pullnames[pull], slpmnames[slpm],
output ? "output " : "input",
gpio_dev->gc.base = 0;
gpio_dev->gc.label = pdev->name;
gpio_dev->gc.owner = THIS_MODULE;
- gpio_dev->gc.dev = &pdev->dev;
+ gpio_dev->gc.parent = &pdev->dev;
gpio_dev->gc.ngpio = TOTAL_NUMBER_OF_PINS;
#if defined(CONFIG_OF_GPIO)
gpio_dev->gc.of_node = pdev->dev.of_node;
}
as_pci->gpio_chip = as3722_gpio_chip;
- as_pci->gpio_chip.dev = &pdev->dev;
+ as_pci->gpio_chip.parent = &pdev->dev;
as_pci->gpio_chip.of_node = pdev->dev.parent->of_node;
ret = gpiochip_add(&as_pci->gpio_chip);
if (ret < 0) {
static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev);
+ struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->parent);
struct atmel_pin *pin = atmel_pioctrl->pins[offset];
unsigned reg;
static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev);
+ struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->parent);
struct atmel_pin *pin = atmel_pioctrl->pins[offset];
unsigned reg;
static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
int value)
{
- struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev);
+ struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->parent);
struct atmel_pin *pin = atmel_pioctrl->pins[offset];
unsigned reg;
static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
{
- struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev);
+ struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->parent);
struct atmel_pin *pin = atmel_pioctrl->pins[offset];
atmel_gpio_write(atmel_pioctrl, pin->bank,
static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
- struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->dev);
+ struct atmel_pioctrl *atmel_pioctrl = dev_get_drvdata(chip->parent);
return irq_find_mapping(atmel_pioctrl->irq_domain, offset);
}
atmel_pioctrl->gpio_chip->of_node = dev->of_node;
atmel_pioctrl->gpio_chip->ngpio = atmel_pioctrl->npins;
atmel_pioctrl->gpio_chip->label = dev_name(dev);
- atmel_pioctrl->gpio_chip->dev = dev;
+ atmel_pioctrl->gpio_chip->parent = dev;
atmel_pioctrl->gpio_chip->names = atmel_pioctrl->group_names;
atmel_pioctrl->pm_wakeup_sources = devm_kzalloc(dev,
chip = &at91_chip->chip;
chip->of_node = np;
chip->label = dev_name(&pdev->dev);
- chip->dev = &pdev->dev;
+ chip->parent = &pdev->dev;
chip->owner = THIS_MODULE;
chip->base = alias_idx * MAX_NB_GPIO_PER_BANK;
gpio->chip = u300_gpio_chip;
gpio->chip.ngpio = U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT;
- gpio->chip.dev = &pdev->dev;
+ gpio->chip.parent = &pdev->dev;
gpio->chip.base = 0;
gpio->dev = &pdev->dev;
int ret;
chip->label = DRIVER_NAME;
- chip->dev = pmap->dev;
+ chip->parent = pmap->dev;
chip->request = gpiochip_generic_request;
chip->free = gpiochip_generic_free;
chip->direction_input = dc_gpio_direction_input;
bank->pctl = pctl;
bank->base = pctl->base + GPIO_BANK_BASE(i);
- bank->gpio_chip.dev = pctl->dev;
+ bank->gpio_chip.parent = pctl->dev;
bank->gpio_chip.of_node = child;
ret = gpiochip_add(&bank->gpio_chip);
if (ret < 0) {
gc = &bank->gpio_chip;
gc->base = bank->pin_base;
gc->ngpio = bank->nr_pins;
- gc->dev = &pdev->dev;
+ gc->parent = &pdev->dev;
gc->of_node = bank->of_node;
gc->label = bank->name;
bank->gpio_chip.base = bank_num * ST_GPIO_PINS_PER_BANK;
bank->gpio_chip.ngpio = ST_GPIO_PINS_PER_BANK;
bank->gpio_chip.of_node = np;
- bank->gpio_chip.dev = dev;
+ bank->gpio_chip.parent = dev;
spin_lock_init(&bank->lock);
of_property_read_string(np, "st,bank-name", &range->name);
/* --------- gpio_chip related code --------- */
static void xway_gpio_set(struct gpio_chip *chip, unsigned int pin, int val)
{
- struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
+ struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent);
if (val)
gpio_setbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin));
static int xway_gpio_get(struct gpio_chip *chip, unsigned int pin)
{
- struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
+ struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent);
return gpio_getbit(info->membase[0], GPIO_IN(pin), PORT_PIN(pin));
}
static int xway_gpio_dir_in(struct gpio_chip *chip, unsigned int pin)
{
- struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
+ struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent);
gpio_clearbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
static int xway_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int val)
{
- struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
+ struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent);
gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
xway_gpio_set(chip, pin, val);
xway_pctrl_desc.pins = xway_info.pads;
/* load the gpio chip */
- xway_chip.dev = &pdev->dev;
+ xway_chip.parent = &pdev->dev;
ret = gpiochip_add(&xway_chip);
if (ret) {
dev_err(&pdev->dev, "Failed to register gpio chip\n");
chip->base = 0;
chip->ngpio = ngpio;
chip->label = dev_name(pctrl->dev);
- chip->dev = pctrl->dev;
+ chip->parent = pctrl->dev;
chip->owner = THIS_MODULE;
chip->of_node = pctrl->dev->of_node;
}
state->chip = pmic_gpio_gpio_template;
- state->chip.dev = dev;
+ state->chip.parent = dev;
state->chip.base = -1;
state->chip.ngpio = npins;
state->chip.label = dev_name(dev);
}
state->chip = pmic_mpp_gpio_template;
- state->chip.dev = dev;
+ state->chip.parent = dev;
state->chip.base = -1;
state->chip.ngpio = npins;
state->chip.label = dev_name(dev);
pctrl->chip = pm8xxx_gpio_template;
pctrl->chip.base = -1;
- pctrl->chip.dev = &pdev->dev;
+ pctrl->chip.parent = &pdev->dev;
pctrl->chip.of_node = pdev->dev.of_node;
pctrl->chip.of_gpio_n_cells = 2;
pctrl->chip.label = dev_name(pctrl->dev);
pctrl->chip = pm8xxx_mpp_template;
pctrl->chip.base = -1;
- pctrl->chip.dev = &pdev->dev;
+ pctrl->chip.parent = &pdev->dev;
pctrl->chip.of_node = pdev->dev.of_node;
pctrl->chip.of_gpio_n_cells = 2;
pctrl->chip.label = dev_name(pctrl->dev);
ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq);
if (ret) {
- dev_err(bank->gpio_chip.dev, "unable to lock pin %s-%lu IRQ\n",
+ dev_err(bank->gpio_chip.parent,
+ "unable to lock pin %s-%lu IRQ\n",
bank->name, irqd->hwirq);
return ret;
}
/* gpiolib gpio_set callback function */
static void exynos5440_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
{
- struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->parent);
void __iomem *base = priv->reg_base;
u32 data;
/* gpiolib gpio_get callback function */
static int exynos5440_gpio_get(struct gpio_chip *gc, unsigned offset)
{
- struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->parent);
void __iomem *base = priv->reg_base;
u32 data;
/* gpiolib gpio_direction_input callback function */
static int exynos5440_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
{
- struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->parent);
void __iomem *base = priv->reg_base;
u32 data;
static int exynos5440_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
int value)
{
- struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->parent);
void __iomem *base = priv->reg_base;
u32 data;
/* gpiolib gpio_to_irq callback function */
static int exynos5440_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
{
- struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
+ struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->parent);
unsigned int virq;
if (offset < 16 || offset > 23)
priv->gc = gc;
gc->base = 0;
gc->ngpio = EXYNOS5440_MAX_PINS;
- gc->dev = &pdev->dev;
+ gc->parent = &pdev->dev;
gc->set = exynos5440_gpio_set;
gc->get = exynos5440_gpio_get;
gc->direction_input = exynos5440_gpio_direction_input;
gc = &bank->gpio_chip;
gc->base = drvdata->pin_base + bank->pin_base;
gc->ngpio = bank->nr_pins;
- gc->dev = &pdev->dev;
+ gc->parent = &pdev->dev;
gc->of_node = bank->of_node;
gc->label = bank->name;
gc->to_irq = gpio_pin_to_irq;
gc->label = pfc->info->name;
- gc->dev = pfc->dev;
+ gc->parent = pfc->dev;
gc->owner = THIS_MODULE;
gc->base = 0;
gc->ngpio = pfc->nr_gpio_pins;
chip->label = kstrdup(np->name, GFP_KERNEL);
chip->of_node = np;
chip->of_gpio_n_cells = 2;
- chip->dev = &pdev->dev;
+ chip->parent = &pdev->dev;
/* Add gpio chip to system */
ret = gpiochip_add(chip);
sgpio->chip.gc.of_node = np;
sgpio->chip.gc.of_xlate = sirfsoc_gpio_of_xlate;
sgpio->chip.gc.of_gpio_n_cells = 2;
- sgpio->chip.gc.dev = &pdev->dev;
+ sgpio->chip.gc.parent = &pdev->dev;
sgpio->chip.regs = regs;
err = gpiochip_add(&sgpio->chip.gc);
plgpio->chip.get = plgpio_get_value;
plgpio->chip.set = plgpio_set_value;
plgpio->chip.label = dev_name(&pdev->dev);
- plgpio->chip.dev = &pdev->dev;
+ plgpio->chip.parent = &pdev->dev;
plgpio->chip.owner = THIS_MODULE;
plgpio->chip.of_node = pdev->dev.of_node;
static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->parent);
u32 reg = sunxi_data_reg(offset);
u8 index = sunxi_data_offset(offset);
u32 set_mux = pctl->desc->irq_read_needs_mux &&
static void sunxi_pinctrl_gpio_set(struct gpio_chip *chip,
unsigned offset, int value)
{
- struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->parent);
u32 reg = sunxi_data_reg(offset);
u8 index = sunxi_data_offset(offset);
unsigned long flags;
static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
- struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
+ struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->parent);
struct sunxi_desc_function *desc;
unsigned pinnum = pctl->desc->pin_base + offset;
unsigned irqnum;
irqnum = desc->irqbank * IRQ_PER_BANK + desc->irqnum;
- dev_dbg(chip->dev, "%s: request IRQ for GPIO %d, return %d\n",
+ dev_dbg(chip->parent, "%s: request IRQ for GPIO %d, return %d\n",
chip->label, offset + chip->base, irqnum);
return irq_find_mapping(pctl->domain, irqnum);
pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) -
pctl->desc->pin_base;
pctl->chip->label = dev_name(&pdev->dev);
- pctl->chip->dev = &pdev->dev;
+ pctl->chip->parent = &pdev->dev;
pctl->chip->base = pctl->desc->pin_base;
ret = gpiochip_add(pctl->chip);
static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
- struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
+ struct wmt_pinctrl_data *data = dev_get_drvdata(chip->parent);
u32 bank = WMT_BANK_FROM_PIN(offset);
u32 bit = WMT_BIT_FROM_PIN(offset);
u32 reg_dir = data->banks[bank].reg_dir;
static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
{
- struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
+ struct wmt_pinctrl_data *data = dev_get_drvdata(chip->parent);
u32 bank = WMT_BANK_FROM_PIN(offset);
u32 bit = WMT_BIT_FROM_PIN(offset);
u32 reg_data_in = data->banks[bank].reg_data_in;
static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
int val)
{
- struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
+ struct wmt_pinctrl_data *data = dev_get_drvdata(chip->parent);
u32 bank = WMT_BANK_FROM_PIN(offset);
u32 bit = WMT_BIT_FROM_PIN(offset);
u32 reg_data_out = data->banks[bank].reg_data_out;
wmt_desc.npins = data->npins;
data->gpio_chip = wmt_gpio_chip;
- data->gpio_chip.dev = &pdev->dev;
+ data->gpio_chip.parent = &pdev->dev;
data->gpio_chip.of_node = pdev->dev.of_node;
data->gpio_chip.ngpio = data->nbanks * 32;
pg->chip.base = pdata->gpio_base;
pg->chip.ngpio = NUM_GPIO;
pg->chip.can_sleep = 1;
- pg->chip.dev = dev;
+ pg->chip.parent = dev;
mutex_init(&pg->buslock);
- pg->chip.dev = dev;
+ pg->chip.parent = dev;
retval = gpiochip_add(&pg->chip);
if (retval) {
pr_err("Can not add pmic gpio chip\n");
#ifdef CONFIG_GPIOLIB
/* Setup GPIO cotroller */
s->gpio.owner = THIS_MODULE;
- s->gpio.dev = dev;
+ s->gpio.parent = dev;
s->gpio.label = dev_name(dev);
s->gpio.direction_input = max310x_gpio_direction_input;
s->gpio.get = max310x_gpio_get;
if (devtype->nr_gpio) {
/* Setup GPIO cotroller */
s->gpio.owner = THIS_MODULE;
- s->gpio.dev = dev;
+ s->gpio.parent = dev;
s->gpio.label = dev_name(dev);
s->gpio.direction_input = sc16is7xx_gpio_direction_input;
s->gpio.get = sc16is7xx_gpio_get;
/**
* struct gpio_chip - abstract a GPIO controller
* @label: for diagnostics
- * @dev: optional device providing the GPIOs
+ * @parent: optional parent device providing the GPIOs
* @cdev: class device used by sysfs interface (may be NULL)
* @owner: helps prevent removal of modules exporting active GPIOs
* @list: links gpio_chips together for traversal
*/
struct gpio_chip {
const char *label;
- struct device *dev;
+ struct device *parent;
struct device *cdev;
struct module *owner;
struct list_head list;
rt5677->gpio_chip = rt5677_template_chip;
rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM;
- rt5677->gpio_chip.dev = &i2c->dev;
+ rt5677->gpio_chip.parent = &i2c->dev;
rt5677->gpio_chip.base = -1;
ret = gpiochip_add(&rt5677->gpio_chip);
wm5100->gpio_chip = wm5100_template_chip;
wm5100->gpio_chip.ngpio = 6;
- wm5100->gpio_chip.dev = &i2c->dev;
+ wm5100->gpio_chip.parent = &i2c->dev;
if (wm5100->pdata.gpio_base)
wm5100->gpio_chip.base = wm5100->pdata.gpio_base;
wm8903->gpio_chip = wm8903_template_chip;
wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO;
- wm8903->gpio_chip.dev = wm8903->dev;
+ wm8903->gpio_chip.parent = wm8903->dev;
if (pdata->gpio_base)
wm8903->gpio_chip.base = pdata->gpio_base;
wm8962->gpio_chip = wm8962_template_chip;
wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO;
- wm8962->gpio_chip.dev = codec->dev;
+ wm8962->gpio_chip.parent = codec->dev;
if (pdata->gpio_base)
wm8962->gpio_chip.base = pdata->gpio_base;
wm8996->gpio_chip = wm8996_template_chip;
wm8996->gpio_chip.ngpio = 5;
- wm8996->gpio_chip.dev = wm8996->dev;
+ wm8996->gpio_chip.parent = wm8996->dev;
if (wm8996->pdata.gpio_base)
wm8996->gpio_chip.base = wm8996->pdata.gpio_base;
projects / users / hch / dma-mapping.git / commitdiff