{
XiveSource *xsrc = &xive->source;
- if (lisn >= xive->nr_irqs) {
- return false;
- }
+ assert(lisn < xive->nr_irqs);
/*
* Set default values when allocating an IRQ number
bool spapr_xive_irq_free(SpaprXive *xive, uint32_t lisn)
{
- if (lisn >= xive->nr_irqs) {
- return false;
- }
+ assert(lisn < xive->nr_irqs);
xive->eat[lisn].w &= cpu_to_be64(~EAS_VALID);
return true;
ICSState *ics = spapr->ics;
assert(ics);
-
- if (!ics_valid_irq(ics, irq)) {
- error_setg(errp, "IRQ %d is invalid", irq);
- return -1;
- }
+ assert(ics_valid_irq(ics, irq));
if (!ics_irq_free(ics, irq - ics->offset)) {
error_setg(errp, "IRQ %d is not free", irq);
ICSState *ics = spapr->ics;
uint32_t srcno = irq - ics->offset;
- if (ics_valid_irq(ics, irq)) {
- memset(&ics->irqs[srcno], 0, sizeof(ICSIRQState));
- }
+ assert(ics_valid_irq(ics, irq));
+
+ memset(&ics->irqs[srcno], 0, sizeof(ICSIRQState));
}
static void spapr_irq_print_info_xics(SpaprMachineState *spapr, Monitor *mon)
int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp)
{
+ assert(irq >= SPAPR_XIRQ_BASE);
+ assert(irq < (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
+
return spapr->irq->claim(spapr, irq, lsi, errp);
}
{
int i;
+ assert(irq >= SPAPR_XIRQ_BASE);
+ assert((irq + num) <= (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
+
for (i = irq; i < (irq + num); i++) {
spapr->irq->free(spapr, i);
}