clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
                                         <&clk IMX8MQ_CLK_UART1_ROOT>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };
 
                                clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
                                         <&clk IMX8MQ_CLK_UART3_ROOT>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };
 
                                clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
                                         <&clk IMX8MQ_CLK_UART2_ROOT>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };
 
                                clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
                                         <&clk IMX8MQ_CLK_UART4_ROOT>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };