tg3: Recode PCI MRRS adjustment as a PCI quirk

This patch recodes the MRRS cap for 5719 A0 devices as a PCI quirk.

(cherry picked from commit 0b471506712dd734964b3270d2aa88160712c262)
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Joe Jin <joe.jin@oracle.com>

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 319dffd19d066eee6bea9738ba7f4c013ff0c397..b08ecf24e95ebdfce9f5e7b82c6366a50049ef7d 100644 (file)
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -14250,12 +14250,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
 
                tg3_flag_set(tp, PCI_EXPRESS);
 
-               if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0) {
-                       int readrq = pcie_get_readrq(tp->pdev);
-                       if (readrq > 2048)
-                               pcie_set_readrq(tp->pdev, 2048);
-               }
-
                pci_read_config_word(tp->pdev,
                                     pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
                                     &lnkctl);

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 975af4353e73bd429ad972bdafa76495765b42ad..6cf246d84a00058f61e29e42ae6a9d626e63b063 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2160,6 +2160,24 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
                        PCI_DEVICE_ID_NX2_5709S,
                        quirk_brcm_570x_limit_vpd);
 
+static void __devinit quirk_brcm_5719_limit_mrrs(struct pci_dev *dev)
+{
+       u32 rev;
+
+       pci_read_config_dword(dev, 0xf4, &rev);
+
+       /* Only CAP the MRRS if the device is a 5719 A0 */
+       if (rev == 0x05719000) {
+               int readrq = pcie_get_readrq(dev);
+               if (readrq > 2048)
+                       pcie_set_readrq(dev, 2048);
+       }
+}
+
+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM,
+                        PCI_DEVICE_ID_TIGON3_5719,
+                        quirk_brcm_5719_limit_mrrs);
+
 /* Originally in EDAC sources for i82875P:
  * Intel tells BIOS developers to hide device 6 which
  * configures the overflow device access containing

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 057093043067c78182d2adec6c566e2c5121107c..90298601f9328143c30d0db3d0621334c1fce6dd 100644 (file)
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2077,6 +2077,7 @@
 #define PCI_DEVICE_ID_NX2_57711E       0x1650
 #define PCI_DEVICE_ID_TIGON3_5705      0x1653
 #define PCI_DEVICE_ID_TIGON3_5705_2    0x1654
+#define PCI_DEVICE_ID_TIGON3_5719      0x1657
 #define PCI_DEVICE_ID_TIGON3_5721      0x1659
 #define PCI_DEVICE_ID_TIGON3_5722      0x165a
 #define PCI_DEVICE_ID_TIGON3_5723      0x165b