RT5682S_DAI_NUM_CLKS,
 };
 
+enum {
+       RT5682S_LDO_1_607V,
+       RT5682S_LDO_1_5V,
+       RT5682S_LDO_1_406V,
+       RT5682S_LDO_1_731V,
+};
+
 struct rt5682s_platform_data {
        enum rt5682s_dmic1_data_pin dmic1_data_pin;
        enum rt5682s_dmic1_clk_pin dmic1_clk_pin;
        unsigned int dmic_clk_rate;
        unsigned int dmic_delay;
        unsigned int amic_delay;
+       unsigned int ldo_dacref;
        bool dmic_clk_driving_high;
 
        const char *dai_clk_names[RT5682S_DAI_NUM_CLKS];
 
                &rt5682s->pdata.dmic_delay);
        device_property_read_u32(dev, "realtek,amic-delay-ms",
                &rt5682s->pdata.amic_delay);
+       device_property_read_u32(dev, "realtek,ldo-sel",
+               &rt5682s->pdata.ldo_dacref);
 
        if (device_property_read_string_array(dev, "clock-output-names",
                                              rt5682s->pdata.dai_clk_names,
                break;
        }
 
+       /* LDO output voltage control */
+       switch (rt5682s->pdata.ldo_dacref) {
+       case RT5682S_LDO_1_607V:
+               break;
+       case RT5682S_LDO_1_5V:
+               regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
+                       RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_5V);
+               break;
+       case RT5682S_LDO_1_406V:
+               regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
+                       RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_406V);
+               break;
+       case RT5682S_LDO_1_731V:
+               regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
+                       RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_731V);
+               break;
+       default:
+               dev_warn(&i2c->dev, "invalid LDO output setting.\n");
+               break;
+       }
+
        INIT_DELAYED_WORK(&rt5682s->jack_detect_work, rt5682s_jack_detect_handler);
        INIT_DELAYED_WORK(&rt5682s->jd_check_work, rt5682s_jd_check_handler);
 
 
 #define RT5682S_JDH_NO_PLUG                    (0x1 << 4)
 #define RT5682S_JDH_PLUG                       (0x0 << 4)
 
+/* Bias current control 7  (0x0110) */
+#define RT5682S_LDO_DACREF_MASK                        (0x3 << 4)
+#define RT5682S_LDO_DACREF_1_607V              (0x0 << 4)
+#define RT5682S_LDO_DACREF_1_5V                        (0x1 << 4)
+#define RT5682S_LDO_DACREF_1_406V              (0x2 << 4)
+#define RT5682S_LDO_DACREF_1_731V              (0x3 << 4)
+
 /* Charge Pump Internal Register1 (0x0125) */
 #define RT5682S_CP_CLK_HP_MASK                 (0x3 << 4)
 #define RT5682S_CP_CLK_HP_100KHZ               (0x0 << 4)