arm64: dts: imx8mp-debix: remove unused fec pinctrl node

The SoM A uses the EQOS ethernet interface and not the FEC, so drop the
interface pinctrl node from the device tree.

Fixes: c86d350aae68 ("arm64: dts: Add device tree for the Debix Model A Board")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
index d6b1aa8047b282fa3a218e82a2847589300c99b3..28db9349ed62c41c6162f5d9c3fd96a67b023ede 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
@@ -354,28 +354,6 @@
                >;
        };
 
-       pinctrl_fec: fecgrp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC                               0x3
-                       MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO                              0x3
-                       MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0                         0x91
-                       MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1                         0x91
-                       MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2                         0x91
-                       MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3                         0x91
-                       MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC                          0x91
-                       MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL                      0x91
-                       MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0                         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1                         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2                         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3                         0x1f
-                       MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL                      0x1f
-                       MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC                         0x1f
-                       MX8MP_IOMUXC_SAI1_RXD1__ENET1_1588_EVENT1_OUT                   0x1f
-                       MX8MP_IOMUXC_SAI1_RXD0__ENET1_1588_EVENT1_IN                    0x1f
-                       MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19                              0x19
-               >;
-       };
-
        pinctrl_gpio_led: gpioledgrp {
                fsl,pins = <
                        MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16                           0x19