FIA3,
 };
 
+enum hpd_pin {
+       HPD_NONE = 0,
+       HPD_TV = HPD_NONE,     /* TV is known to be unreliable */
+       HPD_CRT,
+       HPD_SDVO_B,
+       HPD_SDVO_C,
+       HPD_PORT_A,
+       HPD_PORT_B,
+       HPD_PORT_C,
+       HPD_PORT_D,
+       HPD_PORT_E,
+       HPD_PORT_TC1,
+       HPD_PORT_TC2,
+       HPD_PORT_TC3,
+       HPD_PORT_TC4,
+       HPD_PORT_TC5,
+       HPD_PORT_TC6,
+
+       HPD_NUM_PINS
+};
+
+#define for_each_hpd_pin(__pin) \
+       for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
+
 #define for_each_pipe(__dev_priv, __p) \
        for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
                for_each_if(INTEL_INFO(__dev_priv)->pipe_mask & BIT(__p))
 
 
 struct drm_i915_gem_object;
 
-enum hpd_pin {
-       HPD_NONE = 0,
-       HPD_TV = HPD_NONE,     /* TV is known to be unreliable */
-       HPD_CRT,
-       HPD_SDVO_B,
-       HPD_SDVO_C,
-       HPD_PORT_A,
-       HPD_PORT_B,
-       HPD_PORT_C,
-       HPD_PORT_D,
-       HPD_PORT_E,
-       HPD_PORT_TC1,
-       HPD_PORT_TC2,
-       HPD_PORT_TC3,
-       HPD_PORT_TC4,
-       HPD_PORT_TC5,
-       HPD_PORT_TC6,
-
-       HPD_NUM_PINS
-};
-
-#define for_each_hpd_pin(__pin) \
-       for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
-
 /* Threshold == 5 for long IRQs, 50 for short */
 #define HPD_STORM_DEFAULT_THRESHOLD 50