Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...

Pull arm64 updates from Catalin Marinas:
 "No major architecture features this time around, just some new HWCAP
  definitions, support for the Ampere SoC PMUs and a few fixes/cleanups.

  The bulk of the changes is reworking of the CPU capability checking
  code (cpus_have_cap() etc).

   - Major refactoring of the CPU capability detection logic resulting
     in the removal of the cpus_have_const_cap() function and migrating
     the code to "alternative" branches where possible

   - Backtrace/kgdb: use IPIs and pseudo-NMI

   - Perf and PMU:

      - Add support for Ampere SoC PMUs

      - Multi-DTC improvements for larger CMN configurations with
        multiple Debug & Trace Controllers

      - Rework the Arm CoreSight PMU driver to allow separate
        registration of vendor backend modules

      - Fixes: add missing MODULE_DEVICE_TABLE to the amlogic perf
        driver; use device_get_match_data() in the xgene driver; fix
        NULL pointer dereference in the hisi driver caused by calling
        cpuhp_state_remove_instance(); use-after-free in the hisi driver

   - HWCAP updates:

      - FEAT_SVE_B16B16 (BFloat16)

      - FEAT_LRCPC3 (release consistency model)

      - FEAT_LSE128 (128-bit atomic instructions)

   - SVE: remove a couple of pseudo registers from the cpufeature code.
     There is logic in place already to detect mismatched SVE features

   - Miscellaneous:

      - Reduce the default swiotlb size (currently 64MB) if no ZONE_DMA
        bouncing is needed. The buffer is still required for small
        kmalloc() buffers

      - Fix module PLT counting with !RANDOMIZE_BASE

      - Restrict CPU_BIG_ENDIAN to LLVM IAS 15.x or newer move
        synchronisation code out of the set_ptes() loop

      - More compact cpufeature displaying enabled cores

      - Kselftest updates for the new CPU features"

 * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (83 commits)
  arm64: Restrict CPU_BIG_ENDIAN to GNU as or LLVM IAS 15.x or newer
  arm64: module: Fix PLT counting when CONFIG_RANDOMIZE_BASE=n
  arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helper
  perf: hisi: Fix use-after-free when register pmu fails
  drivers/perf: hisi_pcie: Initialize event->cpu only on success
  drivers/perf: hisi_pcie: Check the type first in pmu::event_init()
  arm64: cpufeature: Change DBM to display enabled cores
  arm64: cpufeature: Display the set of cores with a feature
  perf/arm-cmn: Enable per-DTC counter allocation
  perf/arm-cmn: Rework DTC counters (again)
  perf/arm-cmn: Fix DTC domain detection
  drivers: perf: arm_pmuv3: Drop some unused arguments from armv8_pmu_init()
  drivers: perf: arm_pmuv3: Read PMMIR_EL1 unconditionally
  drivers/perf: hisi: use cpuhp_state_remove_instance_nocalls() for hisi_hns3_pmu uninit process
  clocksource/drivers/arm_arch_timer: limit XGene-1 workaround
  arm64: Remove system_uses_lse_atomics()
  arm64: Mark the 'addr' argument to set_ptes() and __set_pte_at() as unused
  drivers/perf: xgene: Use device_get_match_data()
  perf/amlogic: add missing MODULE_DEVICE_TABLE
  arm64/mm: Hoist synchronization out of set_ptes() loop
  ...

diff --cc arch/arm64/Kconfig
Simple merge

diff --cc arch/arm64/include/asm/cputype.h
Simple merge

diff --cc arch/arm64/kernel/cpu_errata.c
index 5706e74c55786a2f6498af9084c5dcab735f9218,86aed329d42c81e976e9cec1e1d828ffeb9a070f..e29e0fea63fb626bea3abd2ad707b3eb08df7f5b
--- 1/arch/arm64/kernel/cpu_errata.c
--- 2/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@@ -727,17 -711,8 +711,16 @@@ const struct arm64_cpu_capabilities arm
                /* Cortex-A510 r0p0 - r1p1 */
                ERRATA_MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1),
                MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
-               .cpu_enable = cpu_clear_bf16_from_user_emulation,
        },
  #endif
 +#ifdef CONFIG_ARM64_ERRATUM_2966298
 +      {
 +              .desc = "ARM erratum 2966298",
 +              .capability = ARM64_WORKAROUND_2966298,
 +              /* Cortex-A520 r0p0 - r0p1 */
 +              ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
 +      },
 +#endif
  #ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38
        {
                .desc = "AmpereOne erratum AC03_CPU_38",

diff --cc arch/arm64/kernel/smp.c
Simple merge

diff --cc arch/arm64/kvm/sys_regs.c
Simple merge

diff --cc arch/arm64/mm/hugetlbpage.c
Simple merge

diff --cc arch/arm64/tools/cpucaps
Simple merge

diff --cc drivers/irqchip/irq-gic-v3.c
Simple merge

diff --cc drivers/perf/arm-cmn.c
Simple merge

diff --cc drivers/perf/arm_cspmu/arm_cspmu.c
Simple merge

diff --cc include/linux/acpi.h
Simple merge

diff --cc include/linux/cpuhotplug.h
Simple merge