]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
qla2xxx: Use #defines instead of hardcoded values for intr status.
authorArun Easi <arun.easi@qlogic.com>
Thu, 15 Sep 2011 03:54:33 +0000 (20:54 -0700)
committerMaxim Uvarov <maxim.uvarov@oracle.com>
Mon, 27 Aug 2012 09:44:27 +0000 (02:44 -0700)
JIRA Key: V2632FC-191

drivers/scsi/qla2xxx/qla_def.h
drivers/scsi/qla2xxx/qla_isr.c

index d990e74c3c5034dbe2c6de25d88ce8d81bbdc7f4..15b36703b95f15bd4ebc847eee3a90f5e420eaba 100644 (file)
@@ -674,6 +674,15 @@ typedef struct {
 /* 83XX FCoE specific */
 #define MBA_IDC_AEN            0x8200  /* FCoE: NIC Core state change AEN */
 
+/* Interrupt type codes */
+#define INTR_ROM_MB_SUCCESS            0x1
+#define INTR_ROM_MB_FAILED             0x2
+#define INTR_MB_SUCCESS                        0x10
+#define INTR_MB_FAILED                 0x11
+#define INTR_ASYNC_EVENT               0x12
+#define INTR_RSP_QUE_UPDATE            0x13
+#define INTR_RSP_QUE_UPDATE_83XX       0x14
+
 /* ISP mailbox loopback echo diagnostic error code */
 #define MBS_LB_RESET   0x17
 /*
index 886c6e269f35b8070f15e03b26947122ed21b83a..b2e81eb12982706711800d1ccf2a83952de9a5a2 100644 (file)
@@ -2497,23 +2497,23 @@ qla24xx_intr_handler(int irq, void *dev_id)
                        break;
 
                switch (stat & 0xff) {
-               case 0x1:
-               case 0x2:
-               case 0x10:
-               case 0x11:
+               case INTR_ROM_MB_SUCCESS:
+               case INTR_ROM_MB_FAILED:
+               case INTR_MB_SUCCESS:
+               case INTR_MB_FAILED:
                        qla24xx_mbx_completion(vha, MSW(stat));
                        status |= MBX_INTERRUPT;
 
                        break;
-               case 0x12:
+               case INTR_ASYNC_EVENT:
                        mb[0] = MSW(stat);
                        mb[1] = RD_REG_WORD(&reg->mailbox1);
                        mb[2] = RD_REG_WORD(&reg->mailbox2);
                        mb[3] = RD_REG_WORD(&reg->mailbox3);
                        qla2x00_async_event(vha, rsp, mb);
                        break;
-               case 0x13:
-               case 0x14:
+               case INTR_RSP_QUE_UPDATE:
+               case INTR_RSP_QUE_UPDATE_83XX:
                        qla24xx_process_response_queue(vha, rsp);
                        break;
                default:
@@ -2641,23 +2641,23 @@ qla24xx_msix_default(int irq, void *dev_id)
                        break;
 
                switch (stat & 0xff) {
-               case 0x1:
-               case 0x2:
-               case 0x10:
-               case 0x11:
+               case INTR_ROM_MB_SUCCESS:
+               case INTR_ROM_MB_FAILED:
+               case INTR_MB_SUCCESS:
+               case INTR_MB_FAILED:
                        qla24xx_mbx_completion(vha, MSW(stat));
                        status |= MBX_INTERRUPT;
 
                        break;
-               case 0x12:
+               case INTR_ASYNC_EVENT:
                        mb[0] = MSW(stat);
                        mb[1] = RD_REG_WORD(&reg->mailbox1);
                        mb[2] = RD_REG_WORD(&reg->mailbox2);
                        mb[3] = RD_REG_WORD(&reg->mailbox3);
                        qla2x00_async_event(vha, rsp, mb);
                        break;
-               case 0x13:
-               case 0x14:
+               case INTR_RSP_QUE_UPDATE:
+               case INTR_RSP_QUE_UPDATE_83XX:
                        qla24xx_process_response_queue(vha, rsp);
                        break;
                default: