drm/i915: Disable tesselation clock gating on tgl A0

Disable TEDOP clock gating flow by programming 0x20A0[19] = 1

References: HSDES#1407928979
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207155138.30978-1-mika.kuoppala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 61106129287fe6f7cdd84d86272f8bc7430d8af0..4bbea781c142c8819b5270f83648cf046013aa1c 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1352,6 +1352,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                wa_write_or(wal,
                            GEN7_SARCHKMD,
                            GEN7_DISABLE_SAMPLER_PREFETCH);
+
+               /* Wa_1407928979:tgl */
+               wa_write_or(wal,
+                           GEN7_FF_THREAD_MODE,
+                           GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
        }
 
        if (IS_GEN(i915, 11)) {

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dc206723f25ece12601f11a06239e5980845765a..b62029a10ed653cdab4ab9462f405fb8299798ab 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3165,6 +3165,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN7_FF_THREAD_MODE            _MMIO(0x20a0)
 #define   GEN7_FF_SCHED_MASK           0x0077070
 #define   GEN8_FF_DS_REF_CNT_FFME      (1 << 19)
+#define   GEN12_FF_TESSELATION_DOP_GATE_DISABLE BIT(19)
 #define   GEN7_FF_TS_SCHED_HS1         (0x5 << 16)
 #define   GEN7_FF_TS_SCHED_HS0         (0x3 << 16)
 #define   GEN7_FF_TS_SCHED_LOAD_BALANCE        (0x1 << 16)