]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/amdkfd: hard-code cacheline for gc943,gc944
authorDavid Yat Sin <David.YatSin@amd.com>
Tue, 26 Nov 2024 20:18:47 +0000 (15:18 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Dec 2024 23:34:57 +0000 (18:34 -0500)
Cacheline size is not available in IP discovery for gc943,gc944.

Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdkfd/kfd_crat.c

index 723f1220e1cc987cea1b57c1c0e865f92c2b252d..7b826a136ceb9228aa227cbed8e10772af77eb77 100644 (file)
@@ -1510,6 +1510,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_tcp_size_per_cu) {
                pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu;
                pcache_info[i].cache_level = 1;
+               /* Cacheline size not available in IP discovery for gc943,gc944 */
+               pcache_info[i].cache_line_size = 128;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1521,6 +1523,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
                pcache_info[i].cache_size =
                        adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;
                pcache_info[i].cache_level = 1;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_INST_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1531,6 +1534,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {
                pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;
                pcache_info[i].cache_level = 1;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1541,6 +1545,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_tcc_size) {
                pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size;
                pcache_info[i].cache_level = 2;
+               pcache_info[i].cache_line_size = 128;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1551,6 +1556,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gmc.mall_size) {
                pcache_info[i].cache_size = adev->gmc.mall_size / 1024;
                pcache_info[i].cache_level = 3;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);