ASoC: SOF: amd: Add acp-psp mailbox interface for iram-dram fence register modification

Add acp-psp mailbox communication interface for iram-dram size
modification to notify psp.

Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://msgid.link/r/20231219112416.3334928-5-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c
index 7860724c4d2d82b9bc4367d2f820235c34690aab..32a741fcb84fffcc3988e4deabf4e99ef4863d49 100644 (file)
--- a/sound/soc/sof/amd/acp.c
+++ b/sound/soc/sof/amd/acp.c
@@ -278,6 +278,17 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr,
                        return ret;
        }
 
+       /* psp_send_cmd only required for vangogh platform (rev - 5) */
+       if (desc->rev == 5) {
+               /* Modify IRAM and DRAM size */
+               ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | IRAM_DRAM_FENCE_2);
+               if (ret)
+                       return ret;
+               ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | MBOX_ISREADY_FLAG);
+               if (ret)
+                       return ret;
+       }
+
        ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER,
                                            fw_qualifier, fw_qualifier & DSP_FW_RUN_ENABLE,
                                            ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US);

diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h
index c536cfde0e4447699c121026f9c7a0ce8375251c..c645aee216fd0b5fa94f4d69e482f103d4015419 100644 (file)
--- a/sound/soc/sof/amd/acp.h
+++ b/sound/soc/sof/amd/acp.h
@@ -74,9 +74,14 @@
 #define MP0_C2PMSG_114_REG                     0x3810AC8
 #define MP0_C2PMSG_73_REG                      0x3810A24
 #define MBOX_ACP_SHA_DMA_COMMAND               0x70000
+#define MBOX_ACP_IRAM_DRAM_FENCE_COMMAND       0x80000
 #define MBOX_DELAY_US                          1000
 #define MBOX_READY_MASK                                0x80000000
 #define MBOX_STATUS_MASK                       0xFFFF
+#define MBOX_ISREADY_FLAG                      0x40000000
+#define IRAM_DRAM_FENCE_0                      0X0
+#define IRAM_DRAM_FENCE_1                      0X01
+#define IRAM_DRAM_FENCE_2                      0X02
 
 #define BOX_SIZE_512                           0x200
 #define BOX_SIZE_1024                          0x400