drm/amd/display: Do not read DSC state if not in use

[why & how]
DSC may be power gated when coming out of S0i3, so avoid polling
DSC registers since it will fail anyways. Only read if it is known
that DSC is in use.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <Ovidiu.Bunea@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index bd309dbdf7b2a7c95e87d151c3002539e9778e68..3cb4e99074113edf4f3cc8147ae096e9e1bb44ea 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -841,6 +841,7 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)
                        uint32_t num_opps = 0;
                        uint32_t opp_id_src0 = OPP_ID_INVALID;
                        uint32_t opp_id_src1 = OPP_ID_INVALID;
+                       uint32_t optc_dsc_state = 0;
 
                        // Step 1: To find out which OPTC is running & OPTC DSC is ON
                        // We can't use res_pool->res_cap->num_timing_generator to check
@@ -849,7 +850,6 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)
                        // Some ASICs would be fused display pipes less than the default setting.
                        // In dcnxx_resource_construct function, driver would obatin real information.
                        for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
-                               uint32_t optc_dsc_state = 0;
                                struct timing_generator *tg = dc->res_pool->timing_generators[i];
 
                                if (tg->funcs->is_tg_enabled(tg)) {
@@ -864,15 +864,18 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)
                                }
                        }
 
-                       // Step 2: To power down DSC but skip DSC  of running OPTC
+                       // Step 2: To power down DSC but skip DSC of running OPTC
                        for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) {
                                struct dcn_dsc_state s  = {0};
 
-                               dc->res_pool->dscs[i]->funcs->dsc_read_state(dc->res_pool->dscs[i], &s);
+                               /* avoid reading DSC state when it is not in use as it may be power gated */
+                               if (optc_dsc_state) {
+                                       dc->res_pool->dscs[i]->funcs->dsc_read_state(dc->res_pool->dscs[i], &s);
 
-                               if ((s.dsc_opp_source == opp_id_src0 || s.dsc_opp_source == opp_id_src1) &&
-                                       s.dsc_clock_en && s.dsc_fw_en)
-                                       continue;
+                                       if ((s.dsc_opp_source == opp_id_src0 || s.dsc_opp_source == opp_id_src1) &&
+                                               s.dsc_clock_en && s.dsc_fw_en)
+                                               continue;
+                               }
 
                                pg_cntl->funcs->dsc_pg_control(pg_cntl, dc->res_pool->dscs[i]->inst, false);
                        }