},
 };
 
+static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
+       .halt_reg = 0x49004,
+       .clkr = {
+               .enable_reg = 0x49004,
+               .enable_mask = BIT(0),
+               .hw.init = &(struct clk_init_data){
+                       .name = "gcc_mss_q6_bimc_axi_clk",
+                       .parent_names = (const char *[]){
+                               "bimc_ddr_clk_src",
+                       },
+                       .num_parents = 1,
+                       .flags = CLK_SET_RATE_PARENT,
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
 static struct clk_branch gcc_oxili_ahb_clk = {
        .halt_reg = 0x59028,
        .clkr = {
        [GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK] = &gcc_ultaudio_lpaif_sec_i2s_clk.clkr,
        [GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK] = &gcc_ultaudio_lpaif_aux_i2s_clk.clkr,
        [GCC_CODEC_DIGCODEC_CLK] = &gcc_codec_digcodec_clk.clkr,
+       [GCC_MSS_Q6_BIMC_AXI_CLK] = &gcc_mss_q6_bimc_axi_clk.clkr,
 };
 
 static struct gdsc *gcc_msm8916_gdscs[] = {
 
 #define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK         157
 #define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK         158
 #define GCC_CODEC_DIGCODEC_CLK                 159
+#define GCC_MSS_Q6_BIMC_AXI_CLK                        160
 
 /* Indexes for GDSCs */
 #define BIMC_GDSC                              0