Fix ethernet / MII problems for ICU862 board

diff --git a/CHANGELOG b/CHANGELOG
index da29766a5b31db439f9de55c5b0c726339bfe9aa..84ed81501061f58583010a74225d58226da07369 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -56,6 +56,8 @@ To do:
 Modifications for 1.0.6:
 ======================================================================
 
+* Fix ethernet / MII problems for ICU862 board
+
 * Fix memory controller initialization for ICU862 board
 
 * Patch by Stefan Roese, 19 Sep 2001:

diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index fbd3cd1a7096041a0f28f62fdf01dea42e95727e..b155cedc660c183f8eb76b6fb4e712ebcb25994b 100644 (file)
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -93,7 +93,11 @@ int eth_send(volatile void *packet, int length)
 
        j = 0;
        while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
+#if defined(CONFIG_ICU862)
+               udelay(10);
+#else
                udelay(1);
+#endif
                j++;
        }
        if (j>=TOUT_LOOP) {
@@ -185,9 +189,7 @@ int eth_init (bd_t * bd)
 {
 
        int i;
-#ifndef CONFIG_ICU862
        int busfreq;
-#endif
        volatile immap_t *immr = (immap_t *) CFG_IMMR;
        volatile fec_t *fecp = &(immr->im_cpm.cp_fec);
 
@@ -301,7 +303,6 @@ int eth_init (bd_t * bd)
 
        /* Enable MII mode
         */
-#if !defined(CONFIG_ICU862)
 #if 0  /* Full duplex mode */
        fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;
        fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
@@ -309,11 +310,6 @@ int eth_init (bd_t * bd)
        fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
        fecp->fec_x_cntrl = 0;
 #endif
-#else  /* defined(CONFIG_ICU862) */
-       /* Full duplex mode */
-       fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;
-       fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
-#endif /* !defined(CONFIG_ICU862) */
 
        /* Enable big endian and don't care about SDMA FC.
         */
@@ -323,10 +319,10 @@ int eth_init (bd_t * bd)
         * This rounds up to a multiple of 5MHz so MII speed never
         * exceeds 2.5MHz for 48 MHz and other non-multiples of 5MHz.
         */
-#if !defined(CONFIG_ICU862)
        busfreq = (bd->bi_busfreq * 1000000 + 4999999) / 5000000;
        fecp->fec_mii_speed = ((busfreq * 1000000) / 2500000) & 0x7e;
 
+#if !defined(CONFIG_ICU862)
        /* Configure all of port D for MII.
         */
        immr->im_ioport.iop_pdpar = 0x1fff;
@@ -338,8 +334,9 @@ int eth_init (bd_t * bd)
                immr->im_ioport.iop_pddir = 0x1fff;     /* Rev. D and later */
        }
 #else  /* defined(CONFIG_ICU862) */
-       fecp->fec_mii_speed = 0x40;
-       immr->im_ioport.utmode |= 0x80;
+       /* Configure PCMCIA PORT A for MII, UTOPIA is enabled.
+        */
+       immr->im_ioport.iop_pdpar |= 0x4080;
 #endif /* !defined(CONFIG_ICU862) */
 
        rxIdx = 0;

diff --git a/include/config_ICU862.h b/include/config_ICU862.h
index 21f23e78df02b597a31026125cab16015fbb8813..33ea5a367b51b163c27044e1eae0c31369522938 100644 (file)
--- a/include/config_ICU862.h
+++ b/include/config_ICU862.h
@@ -78,8 +78,8 @@
 
 #undef CONFIG_SCC1_ENET                /* disable SCC1 ethernet */
 #define        CONFIG_FEC_ENET         1       /* use FEC ethernet  */
-#if 0
-#define CFG_DISCOVER_PHY
+#if 1
+#define CFG_DISCOVER_PHY       1
 #else
 #undef CFG_DISCOVER_PHY
 #endif
@@ -236,6 +236,13 @@
                         SCCR_DFBRG00   | SCCR_DFNL000  | SCCR_DFNH000  | \
                         SCCR_DFLCD000  |SCCR_DFALCD00  )
 
+/*-----------------------------------------------------------------------
+ * RCCR - RISC Controller Configuration Register               19-4
+ *-----------------------------------------------------------------------
+ */
+/* +0x09C4 => DRQP = 10 (IDMA requests have lowest priority) */
+#define CFG_RCCR 0x0020
+
  /*-----------------------------------------------------------------------
  *
  *-----------------------------------------------------------------------