]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: ti: k3-j784s4-main: Align watchdog clocks
authorEric Chanudet <echanude@redhat.com>
Mon, 5 Aug 2024 17:42:51 +0000 (13:42 -0400)
committerNishanth Menon <nm@ti.com>
Wed, 28 Aug 2024 17:15:50 +0000 (12:15 -0500)
assigned-clock sets DEV_RTIx_RTI_CLK(id:0) whereas clocks sets
DEV_RTIx_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT(id:1)[1]. This does not
look right, the timers in the driver assume a max frequency of 32kHz for
the heartbeat (HFOSC0 is 19.2MHz on j784s4-evm).

With this change, WDIOC_GETTIMELEFT return coherent time left
(DEFAULT_HEARTBEAT=60, reports 60s upon opening the cdev).

[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html#clocks-for-rti0-device

Fixes: caae599de8c6 ("arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances")
Suggested-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Tested-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240805174330.2132717-2-echanude@redhat.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi

index d4ac1c9872a5e70ff9bf9e3f6146d92fce780a34..e73bb750b09ad5d7503d21574dc912568c880cd1 100644 (file)
        watchdog0: watchdog@2200000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2200000 0x00 0x100>;
-               clocks = <&k3_clks 348 1>;
+               clocks = <&k3_clks 348 0>;
                power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 348 0>;
                assigned-clock-parents = <&k3_clks 348 4>;
        watchdog1: watchdog@2210000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2210000 0x00 0x100>;
-               clocks = <&k3_clks 349 1>;
+               clocks = <&k3_clks 349 0>;
                power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 349 0>;
                assigned-clock-parents = <&k3_clks 349 4>;
        watchdog2: watchdog@2220000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2220000 0x00 0x100>;
-               clocks = <&k3_clks 350 1>;
+               clocks = <&k3_clks 350 0>;
                power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 350 0>;
                assigned-clock-parents = <&k3_clks 350 4>;
        watchdog3: watchdog@2230000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2230000 0x00 0x100>;
-               clocks = <&k3_clks 351 1>;
+               clocks = <&k3_clks 351 0>;
                power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 351 0>;
                assigned-clock-parents = <&k3_clks 351 4>;
        watchdog4: watchdog@2240000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2240000 0x00 0x100>;
-               clocks = <&k3_clks 352 1>;
+               clocks = <&k3_clks 352 0>;
                power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 352 0>;
                assigned-clock-parents = <&k3_clks 352 4>;
        watchdog5: watchdog@2250000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2250000 0x00 0x100>;
-               clocks = <&k3_clks 353 1>;
+               clocks = <&k3_clks 353 0>;
                power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 353 0>;
                assigned-clock-parents = <&k3_clks 353 4>;
        watchdog6: watchdog@2260000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2260000 0x00 0x100>;
-               clocks = <&k3_clks 354 1>;
+               clocks = <&k3_clks 354 0>;
                power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 354 0>;
                assigned-clock-parents = <&k3_clks 354 4>;
        watchdog7: watchdog@2270000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2270000 0x00 0x100>;
-               clocks = <&k3_clks 355 1>;
+               clocks = <&k3_clks 355 0>;
                power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 355 0>;
                assigned-clock-parents = <&k3_clks 355 4>;
        watchdog8: watchdog@22f0000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x22f0000 0x00 0x100>;
-               clocks = <&k3_clks 360 1>;
+               clocks = <&k3_clks 360 0>;
                power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 360 0>;
                assigned-clock-parents = <&k3_clks 360 4>;
        watchdog9: watchdog@2300000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2300000 0x00 0x100>;
-               clocks = <&k3_clks 356 1>;
+               clocks = <&k3_clks 356 0>;
                power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 356 0>;
                assigned-clock-parents = <&k3_clks 356 4>;
        watchdog10: watchdog@2310000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2310000 0x00 0x100>;
-               clocks = <&k3_clks 357 1>;
+               clocks = <&k3_clks 357 0>;
                power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 357 0>;
                assigned-clock-parents = <&k3_clks 357 4>;
        watchdog11: watchdog@2320000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2320000 0x00 0x100>;
-               clocks = <&k3_clks 358 1>;
+               clocks = <&k3_clks 358 0>;
                power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 358 0>;
                assigned-clock-parents = <&k3_clks 358 4>;
        watchdog12: watchdog@2330000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2330000 0x00 0x100>;
-               clocks = <&k3_clks 359 1>;
+               clocks = <&k3_clks 359 0>;
                power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 359 0>;
                assigned-clock-parents = <&k3_clks 359 4>;
        watchdog13: watchdog@23c0000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x23c0000 0x00 0x100>;
-               clocks = <&k3_clks 361 1>;
+               clocks = <&k3_clks 361 0>;
                power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 361 0>;
                assigned-clock-parents = <&k3_clks 361 4>;
        watchdog14: watchdog@23d0000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x23d0000 0x00 0x100>;
-               clocks = <&k3_clks 362 1>;
+               clocks = <&k3_clks 362 0>;
                power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 362 0>;
                assigned-clock-parents = <&k3_clks 362 4>;
        watchdog15: watchdog@23e0000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x23e0000 0x00 0x100>;
-               clocks = <&k3_clks 363 1>;
+               clocks = <&k3_clks 363 0>;
                power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 363 0>;
                assigned-clock-parents = <&k3_clks 363 4>;
        watchdog16: watchdog@23f0000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x23f0000 0x00 0x100>;
-               clocks = <&k3_clks 364 1>;
+               clocks = <&k3_clks 364 0>;
                power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 364 0>;
                assigned-clock-parents = <&k3_clks 364 4>;
        watchdog17: watchdog@2540000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2540000 0x00 0x100>;
-               clocks = <&k3_clks 365 1>;
+               clocks = <&k3_clks 365 0>;
                power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 365 0>;
                assigned-clock-parents = <&k3_clks 366 4>;
        watchdog18: watchdog@2550000 {
                compatible = "ti,j7-rti-wdt";
                reg = <0x00 0x2550000 0x00 0x100>;
-               clocks = <&k3_clks 366 1>;
+               clocks = <&k3_clks 366 0>;
                power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
                assigned-clocks = <&k3_clks 366 0>;
                assigned-clock-parents = <&k3_clks 366 4>;