]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/amd/display: Add missing post flip calls
authorDillon Varone <Dillon.Varone@amd.com>
Mon, 15 Sep 2025 15:35:37 +0000 (11:35 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 23 Sep 2025 14:26:19 +0000 (10:26 -0400)
[WHY&HOW]
dc_post_update_surfaces_to_stream needs to be called after a full update
completes in order to optimize clocks and watermarks for power. Add
missing calls before idle entry is requested to ensure optimal power.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

index 7012b2c692b3af6e990692509b6c8800e01b6b08..09427e0560559a29f291e8b99e42941f377fa77e 100644 (file)
@@ -417,8 +417,7 @@ static inline bool update_planes_and_stream_adapter(struct dc *dc,
        /*
         * Previous frame finished and HW is ready for optimization.
         */
-       if (update_type == UPDATE_TYPE_FAST)
-               dc_post_update_surfaces_to_stream(dc);
+       dc_post_update_surfaces_to_stream(dc);
 
        return dc_update_planes_and_stream(dc,
                                           array_of_surface_update,
index 466dccb355d7ba67e675aa7d03a1fd123c70722b..1ec9d03ad7474ac4c518bdec5bd3cec2bb9ccce9 100644 (file)
@@ -218,8 +218,10 @@ static void amdgpu_dm_idle_worker(struct work_struct *work)
                        break;
                }
 
-               if (idle_work->enable)
+               if (idle_work->enable) {
+                       dc_post_update_surfaces_to_stream(idle_work->dm->dc);
                        dc_allow_idle_optimizations(idle_work->dm->dc, true);
+               }
                mutex_unlock(&idle_work->dm->dc_lock);
        }
        idle_work->dm->idle_workqueue->running = false;
@@ -273,8 +275,10 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
                        vblank_work->acrtc->dm_irq_params.allow_sr_entry);
        }
 
-       if (dm->active_vblank_irq_count == 0)
+       if (dm->active_vblank_irq_count == 0) {
+               dc_post_update_surfaces_to_stream(dm->dc);
                dc_allow_idle_optimizations(dm->dc, true);
+       }
 
        mutex_unlock(&dm->dc_lock);