drm/amd/pm: add new feature map macros to resolve duplicate name

This patch is to add new feature map macros to resolve duplicate name.
Vangogh uses one different format to name some feature bits of swSMU, it
causes some duplicate name in the existing feature map list.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 95dcebdaed9e44445e3b25b6009560e01f4b67a6..a9622b5e9c7b36c2aa454bac6d69143a64be526f 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -1162,6 +1162,12 @@ enum smu_cmn2asic_mapping_type {
 #define FEA_MAP(fea) \
        [SMU_FEATURE_##fea##_BIT] = {1, FEATURE_##fea##_BIT}
 
+#define FEA_MAP_REVERSE(fea) \
+       [SMU_FEATURE_DPM_##fea##_BIT] = {1, FEATURE_##fea##_DPM_BIT}
+
+#define FEA_MAP_HALF_REVERSE(fea) \
+       [SMU_FEATURE_DPM_##fea##CLK_BIT] = {1, FEATURE_##fea##_DPM_BIT}
+
 #define TAB_MAP(tab) \
        [SMU_TABLE_##tab] = {1, TABLE_##tab}
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 0ad4755270774d6804f816bd384c4920d8855c70..085e63348f33efca07fb87183958a234b81b7a7d 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -166,6 +166,9 @@ static struct cmn2asic_mapping vangogh_feature_mask_map[SMU_FEATURE_COUNT] = {
        FEA_MAP(A55_DPM),
        FEA_MAP(CVIP_DSP_DPM),
        FEA_MAP(MSMU_LOW_POWER),
+       FEA_MAP_REVERSE(SOCCLK),
+       FEA_MAP_REVERSE(FCLK),
+       FEA_MAP_HALF_REVERSE(GFX),
 };
 
 static struct cmn2asic_mapping vangogh_table_map[SMU_TABLE_COUNT] = {
@@ -371,6 +374,10 @@ static int vangogh_get_allowed_feature_mask(struct smu_context *smu,
 
        *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_DPM_BIT)
                                | FEATURE_MASK(FEATURE_MP0CLK_DPM_BIT)
+                               | FEATURE_MASK(FEATURE_SOCCLK_DPM_BIT)
+                               | FEATURE_MASK(FEATURE_VCN_DPM_BIT)
+                               | FEATURE_MASK(FEATURE_FCLK_DPM_BIT)
+                               | FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT)
                                | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
                                | FEATURE_MASK(FEATURE_PPT_BIT)
                                | FEATURE_MASK(FEATURE_TDC_BIT)
@@ -384,6 +391,12 @@ static int vangogh_get_allowed_feature_mask(struct smu_context *smu,
        if (adev->pm.pp_feature & PP_DCEFCLK_DPM_MASK)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT);
 
+       if (adev->pm.pp_feature & PP_MCLK_DPM_MASK)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FCLK_DPM_BIT);
+
+       if (adev->pm.pp_feature & PP_SCLK_DPM_MASK)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_DPM_BIT);
+
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);