]> www.infradead.org Git - users/dwmw2/qemu.git/commitdiff
hw/riscv: virt: Simplify virt_{get,set}_aclint()
authorBin Meng <bmeng@tinylab.org>
Mon, 6 Feb 2023 08:50:07 +0000 (16:50 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 6 Feb 2023 22:21:32 +0000 (08:21 +1000)
There is no need to declare an intermediate "MachineState *ms".

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230206085007.3618715-1-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/virt.c

index a061151a6fef50228cb9612d7d85be7c83501c43..b81081c70b1c21bc1fe826ca38131f46090cdf36 100644 (file)
@@ -1583,16 +1583,14 @@ static void virt_set_aia(Object *obj, const char *val, Error **errp)
 
 static bool virt_get_aclint(Object *obj, Error **errp)
 {
-    MachineState *ms = MACHINE(obj);
-    RISCVVirtState *s = RISCV_VIRT_MACHINE(ms);
+    RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
 
     return s->have_aclint;
 }
 
 static void virt_set_aclint(Object *obj, bool value, Error **errp)
 {
-    MachineState *ms = MACHINE(obj);
-    RISCVVirtState *s = RISCV_VIRT_MACHINE(ms);
+    RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
 
     s->have_aclint = value;
 }