u8         crc_error_tlp[0x20];
 
-       u8         reserved_at_140[0x680];
+       u8         reserved_at_140[0x40];
+
+       u8         outbound_stalled_reads[0x20];
+
+       u8         outbound_stalled_writes[0x20];
+
+       u8         outbound_stalled_reads_events[0x20];
+
+       u8         outbound_stalled_writes_events[0x20];
+
+       u8         reserved_at_200[0x5c0];
 };
 
 struct mlx5_ifc_cmd_inter_comp_event_bits {
 };
 
 struct mlx5_ifc_mcam_enhanced_features_bits {
-       u8         reserved_at_0[0x7d];
-
+       u8         reserved_at_0[0x7b];
+       u8         pcie_outbound_stalled[0x1];
+       u8         reserved_at_7c[0x1];
        u8         mtpps_enh_out_per_adj[0x1];
        u8         mtpps_fs[0x1];
        u8         pcie_performance_group[0x1];