int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *value)
 {
        struct controller *ctrl = slot->ctrl;
-       enum pcie_link_speed lnk_speed;
+       enum pci_bus_speed lnk_speed;
        u32     lnk_cap;
        int retval = 0;
 
 
        switch (lnk_cap & 0x000F) {
        case 1:
-               lnk_speed = PCIE_2_5GB;
+               lnk_speed = PCIE_SPEED_2_5GT;
                break;
        case 2:
-               lnk_speed = PCIE_5_0GB;
+               lnk_speed = PCIE_SPEED_5_0GT;
                break;
        default:
-               lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
+               lnk_speed = PCI_SPEED_UNKNOWN;
                break;
        }
 
 int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *value)
 {
        struct controller *ctrl = slot->ctrl;
-       enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN;
+       enum pci_bus_speed lnk_speed = PCI_SPEED_UNKNOWN;
        int retval = 0;
        u16 lnk_status;
 
 
        switch (lnk_status & PCI_EXP_LNKSTA_CLS) {
        case 1:
-               lnk_speed = PCIE_2_5GB;
+               lnk_speed = PCIE_SPEED_2_5GT;
                break;
        case 2:
-               lnk_speed = PCIE_5_0GB;
+               lnk_speed = PCIE_SPEED_5_0GT;
                break;
        default:
-               lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
+               lnk_speed = PCI_SPEED_UNKNOWN;
                break;
        }
 
 
        PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
 };
 
+/* Based on the PCI Hotplug Spec, but some values are made up by us */
+enum pci_bus_speed {
+       PCI_SPEED_33MHz                 = 0x00,
+       PCI_SPEED_66MHz                 = 0x01,
+       PCI_SPEED_66MHz_PCIX            = 0x02,
+       PCI_SPEED_100MHz_PCIX           = 0x03,
+       PCI_SPEED_133MHz_PCIX           = 0x04,
+       PCI_SPEED_66MHz_PCIX_ECC        = 0x05,
+       PCI_SPEED_100MHz_PCIX_ECC       = 0x06,
+       PCI_SPEED_133MHz_PCIX_ECC       = 0x07,
+       PCI_SPEED_66MHz_PCIX_266        = 0x09,
+       PCI_SPEED_100MHz_PCIX_266       = 0x0a,
+       PCI_SPEED_133MHz_PCIX_266       = 0x0b,
+       PCI_SPEED_66MHz_PCIX_533        = 0x11,
+       PCI_SPEED_100MHz_PCIX_533       = 0x12,
+       PCI_SPEED_133MHz_PCIX_533       = 0x13,
+       PCIE_SPEED_2_5GT                = 0x14,
+       PCIE_SPEED_5_0GT                = 0x15,
+       PCI_SPEED_UNKNOWN               = 0xff,
+};
+
 struct pci_cap_saved_state {
        struct hlist_node next;
        char cap_nr;
 
 #ifndef _PCI_HOTPLUG_H
 #define _PCI_HOTPLUG_H
 
-
-/* These values come from the PCI Hotplug Spec */
-enum pci_bus_speed {
-       PCI_SPEED_33MHz                 = 0x00,
-       PCI_SPEED_66MHz                 = 0x01,
-       PCI_SPEED_66MHz_PCIX            = 0x02,
-       PCI_SPEED_100MHz_PCIX           = 0x03,
-       PCI_SPEED_133MHz_PCIX           = 0x04,
-       PCI_SPEED_66MHz_PCIX_ECC        = 0x05,
-       PCI_SPEED_100MHz_PCIX_ECC       = 0x06,
-       PCI_SPEED_133MHz_PCIX_ECC       = 0x07,
-       PCI_SPEED_66MHz_PCIX_266        = 0x09,
-       PCI_SPEED_100MHz_PCIX_266       = 0x0a,
-       PCI_SPEED_133MHz_PCIX_266       = 0x0b,
-       PCI_SPEED_66MHz_PCIX_533        = 0x11,
-       PCI_SPEED_100MHz_PCIX_533       = 0x12,
-       PCI_SPEED_133MHz_PCIX_533       = 0x13,
-       PCI_SPEED_UNKNOWN               = 0xff,
-};
-
 /* These values come from the PCI Express Spec */
 enum pcie_link_width {
        PCIE_LNK_WIDTH_RESRV    = 0x00,
        PCIE_LNK_WIDTH_UNKNOWN  = 0xFF,
 };
 
-enum pcie_link_speed {
-       PCIE_2_5GB              = 0x14,
-       PCIE_5_0GB              = 0x15,
-       PCIE_LNK_SPEED_UNKNOWN  = 0xFF,
-};
-
 /**
  * struct hotplug_slot_ops -the callbacks that the hotplug pci core can use
  * @owner: The module owner of this structure