# Has 4 ARMV8 Cores and 2 R5 Cores
# * AM62P: https://www.ti.com/lit/pdf/spruj83
# Has 4 ARMV8 Cores and 2 R5 Cores
+# * AM62L: https://www.ti.com/lit/pdf/sprujb4
+# Has 2 ARMv8 Cores only
# * AM642: https://www.ti.com/lit/pdf/spruim2
# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
# * AM654x: https://www.ti.com/lit/pdf/spruid7
set R5_CTIBASE {0x9d418000 0x9d518000 0x9d818000}
}
}
+ am62l {
+ set _K3_DAP_TAPID 0x0bba702f
+
+ # AM62Lx has 1 cluster of 2 A53 cores.
+ set _armv8_cpu_name a53
+ set _armv8_cores 2
+ set ARMV8_DBGBASE {0x90010000 0x90110000}
+ set ARMV8_CTIBASE {0x90020000 0x90120000}
+
+ # Has no supporting microcontrollers
+ set _r5_cores 0
+ }
j721e {
set _K3_DAP_TAPID 0x0bb6402f
# J721E has 1 cluster of 2 A72 cores.