return 0;
 }
 
+static void dw_mipi_message_config(struct dw_mipi_dsi *dsi,
+                                  const struct mipi_dsi_msg *msg)
+{
+       u32 val = 0;
+
+       if (msg->flags & MIPI_DSI_MSG_REQ_ACK)
+               val |= EN_ACK_RQST;
+       if (msg->flags & MIPI_DSI_MSG_USE_LPM)
+               val |= CMD_MODE_ALL_LP;
+
+       dsi_write(dsi, DSI_CMD_MODE_CFG, val);
+}
+
 static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
 {
        int ret;
        struct dw_mipi_dsi *dsi = host_to_dsi(host);
        int ret;
 
+       dw_mipi_message_config(dsi, msg);
+
        switch (msg->type) {
        case MIPI_DSI_DCS_SHORT_WRITE:
        case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
 {
        dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
        dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
-       dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
        dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
 }