struct protection_domain *domain)
 {
        struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
-       struct pci_dev *pdev;
        int ret = 0;
 
        /* Update data structures */
        domain->dev_iommu[iommu->index] += 1;
        domain->dev_cnt                 += 1;
 
-       pdev = dev_is_pci(dev_data->dev) ? to_pci_dev(dev_data->dev) : NULL;
+       /* Setup GCR3 table */
        if (pdom_is_sva_capable(domain)) {
                ret = init_gcr3_table(dev_data, domain);
                if (ret)
                        return ret;
-
-               if (pdev) {
-                       pdev_enable_caps(pdev);
-
-                       /*
-                        * Device can continue to function even if IOPF
-                        * enablement failed. Hence in error path just
-                        * disable device PRI support.
-                        */
-                       if (amd_iommu_iopf_add_device(iommu, dev_data))
-                               pdev_disable_cap_pri(pdev);
-               }
-       } else if (pdev) {
-               pdev_enable_cap_ats(pdev);
        }
 
-       /* Update device table */
-       amd_iommu_dev_update_dte(dev_data, true);
-
        return ret;
 }
 
 
        do_detach(dev_data);
 
+out:
+       spin_unlock(&dev_data->lock);
+
+       spin_unlock_irqrestore(&domain->lock, flags);
+
        /* Remove IOPF handler */
        if (ppr)
                amd_iommu_iopf_remove_device(iommu, dev_data);
        if (dev_is_pci(dev))
                pdev_disable_caps(to_pci_dev(dev));
 
-out:
-       spin_unlock(&dev_data->lock);
-
-       spin_unlock_irqrestore(&domain->lock, flags);
 }
 
 static struct iommu_device *amd_iommu_probe_device(struct device *dev)
        struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
        struct protection_domain *domain = to_pdomain(dom);
        struct amd_iommu *iommu = get_amd_iommu_from_dev(dev);
+       struct pci_dev *pdev;
        int ret;
 
        /*
        }
 #endif
 
-       iommu_completion_wait(iommu);
+       pdev = dev_is_pci(dev_data->dev) ? to_pci_dev(dev_data->dev) : NULL;
+       if (pdev && pdom_is_sva_capable(domain)) {
+               pdev_enable_caps(pdev);
+
+               /*
+                * Device can continue to function even if IOPF
+                * enablement failed. Hence in error path just
+                * disable device PRI support.
+                */
+               if (amd_iommu_iopf_add_device(iommu, dev_data))
+                       pdev_disable_cap_pri(pdev);
+       } else if (pdev) {
+               pdev_enable_cap_ats(pdev);
+       }
+
+       /* Update device table */
+       amd_iommu_dev_update_dte(dev_data, true);
 
        return ret;
 }
 
 int amd_iommu_iopf_add_device(struct amd_iommu *iommu,
                              struct iommu_dev_data *dev_data)
 {
-       unsigned long flags;
        int ret = 0;
 
        if (!dev_data->pri_enabled)
                return ret;
 
-       raw_spin_lock_irqsave(&iommu->lock, flags);
-
-       if (!iommu->iopf_queue) {
-               ret = -EINVAL;
-               goto out_unlock;
-       }
+       if (!iommu->iopf_queue)
+               return -EINVAL;
 
        ret = iopf_queue_add_device(iommu->iopf_queue, dev_data->dev);
        if (ret)
-               goto out_unlock;
+               return ret;
 
        dev_data->ppr = true;
-
-out_unlock:
-       raw_spin_unlock_irqrestore(&iommu->lock, flags);
-       return ret;
+       return 0;
 }
 
 /* Its assumed that caller has verified that device was added to iopf queue */
 void amd_iommu_iopf_remove_device(struct amd_iommu *iommu,
                                  struct iommu_dev_data *dev_data)
 {
-       unsigned long flags;
-
-       raw_spin_lock_irqsave(&iommu->lock, flags);
-
        iopf_queue_remove_device(iommu->iopf_queue, dev_data->dev);
        dev_data->ppr = false;
-
-       raw_spin_unlock_irqrestore(&iommu->lock, flags);
 }